[dpdk-stable] patch 'net/i40e/base: fix PHY identifiers for 2.5G and 5G adapters' has been queued to stable release 20.11.4

Xueming Li xuemingl at nvidia.com
Wed Nov 10 07:30:26 CET 2021


Hi,

FYI, your patch has been queued to stable release 20.11.4

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 11/12/21. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/steevenlee/dpdk

This queued commit can be viewed at:
https://github.com/steevenlee/dpdk/commit/9eec8f0a542763987e9d988bc7f3637440984c1a

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From 9eec8f0a542763987e9d988bc7f3637440984c1a Mon Sep 17 00:00:00 2001
From: Robin Zhang <robinx.zhang at intel.com>
Date: Sat, 9 Oct 2021 01:39:44 +0000
Subject: [PATCH] net/i40e/base: fix PHY identifiers for 2.5G and 5G adapters
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit dafd6c6308d441af5a215dc25a7942973c3eda15 ]

Unlike other supported adapters, 2.5G and 5G use different PHY type
identifiers for reading/writing PHY settings and for reading link status.
This commit introduces separate PHY identifiers for these two operation
types.

Fixes: 988ed63c7441 ("net/i40e/base: add support for Carlsville device")

Signed-off-by: Dawid Lukwinski <dawid.lukwinski at intel.com>
Signed-off-by: Robin Zhang <robinx.zhang at intel.com>
Acked-by: Beilei Xing <beilei.xing at intel.com>
---
 drivers/net/i40e/base/i40e_adminq_cmd.h | 6 ++++--
 drivers/net/i40e/base/i40e_common.c     | 4 ++--
 drivers/net/i40e/base/i40e_type.h       | 8 ++------
 3 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h
index 2ca41db5d3..4d80568050 100644
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -1947,8 +1947,10 @@ enum i40e_aq_phy_type {
 	I40E_PHY_TYPE_25GBASE_LR		= 0x22,
 	I40E_PHY_TYPE_25GBASE_AOC		= 0x23,
 	I40E_PHY_TYPE_25GBASE_ACC		= 0x24,
-	I40E_PHY_TYPE_2_5GBASE_T		= 0x30,
-	I40E_PHY_TYPE_5GBASE_T			= 0x31,
+	I40E_PHY_TYPE_2_5GBASE_T		= 0x26,
+	I40E_PHY_TYPE_5GBASE_T			= 0x27,
+	I40E_PHY_TYPE_2_5GBASE_T_LINK_STATUS	= 0x30,
+	I40E_PHY_TYPE_5GBASE_T_LINK_STATUS	= 0x31,
 	I40E_PHY_TYPE_MAX,
 	I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP	= 0xFD,
 	I40E_PHY_TYPE_EMPTY			= 0xFE,
diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index e20bb9ac35..a13513d0b5 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -1280,8 +1280,8 @@ STATIC enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)
 		break;
 	case I40E_PHY_TYPE_100BASE_TX:
 	case I40E_PHY_TYPE_1000BASE_T:
-	case I40E_PHY_TYPE_2_5GBASE_T:
-	case I40E_PHY_TYPE_5GBASE_T:
+	case I40E_PHY_TYPE_2_5GBASE_T_LINK_STATUS:
+	case I40E_PHY_TYPE_5GBASE_T_LINK_STATUS:
 	case I40E_PHY_TYPE_10GBASE_T:
 		media = I40E_MEDIA_TYPE_BASET;
 		break;
diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index cf41345834..4674715ed7 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -329,12 +329,8 @@ struct i40e_phy_info {
 					     I40E_PHY_TYPE_OFFSET)
 #define I40E_CAP_PHY_TYPE_25GBASE_ACC BIT_ULL(I40E_PHY_TYPE_25GBASE_ACC + \
 					     I40E_PHY_TYPE_OFFSET)
-/* Offset for 2.5G/5G PHY Types value to bit number conversion */
-#define I40E_PHY_TYPE_OFFSET2 (-10)
-#define I40E_CAP_PHY_TYPE_2_5GBASE_T BIT_ULL(I40E_PHY_TYPE_2_5GBASE_T + \
-					     I40E_PHY_TYPE_OFFSET2)
-#define I40E_CAP_PHY_TYPE_5GBASE_T BIT_ULL(I40E_PHY_TYPE_5GBASE_T + \
-					     I40E_PHY_TYPE_OFFSET2)
+#define I40E_CAP_PHY_TYPE_2_5GBASE_T BIT_ULL(I40E_PHY_TYPE_2_5GBASE_T)
+#define I40E_CAP_PHY_TYPE_5GBASE_T BIT_ULL(I40E_PHY_TYPE_5GBASE_T)
 #define I40E_HW_CAP_MAX_GPIO			30
 #define I40E_HW_CAP_MDIO_PORT_MODE_MDIO		0
 #define I40E_HW_CAP_MDIO_PORT_MODE_I2C		1
-- 
2.33.0

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2021-11-10 14:17:08.248115201 +0800
+++ 0142-net-i40e-base-fix-PHY-identifiers-for-2.5G-and-5G-ad.patch	2021-11-10 14:17:01.917412376 +0800
@@ -1 +1 @@
-From dafd6c6308d441af5a215dc25a7942973c3eda15 Mon Sep 17 00:00:00 2001
+From 9eec8f0a542763987e9d988bc7f3637440984c1a Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit dafd6c6308d441af5a215dc25a7942973c3eda15 ]
@@ -12 +14,0 @@
-Cc: stable at dpdk.org
@@ -24 +26 @@
-index a96527f31c..af9dec1d7f 100644
+index 2ca41db5d3..4d80568050 100644
@@ -41 +43 @@
-index 32642f3e2b..ceedec68bf 100644
+index e20bb9ac35..a13513d0b5 100644
@@ -56 +58 @@
-index e5a3729183..0323887550 100644
+index cf41345834..4674715ed7 100644


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