[dpdk-stable] patch 'common/mlx5: fix physical port name recognition' has been queued to stable release 20.11.4

Xueming Li xuemingl at nvidia.com
Wed Nov 10 07:31:21 CET 2021


Hi,

FYI, your patch has been queued to stable release 20.11.4

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 11/12/21. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/steevenlee/dpdk

This queued commit can be viewed at:
https://github.com/steevenlee/dpdk/commit/c4e68962efd30f3b4722bf4ad055d592141db69d

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From c4e68962efd30f3b4722bf4ad055d592141db69d Mon Sep 17 00:00:00 2001
From: Xueming Li <xuemingl at nvidia.com>
Date: Wed, 3 Nov 2021 11:18:36 +0200
Subject: [PATCH] common/mlx5: fix physical port name recognition
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit 59df97f1a832a0edfd7f77ffbe5149e553e860b5 ]

While device probing mlx5 PMD get the physical port name
and checks against the set of patterns. If there is no
any pattern match, the driver assumes the port belongs
to PF device, this behaviour provides compatibility with
legacy kernel drivers (before and early SR-IOV support).

The newer kernels added the PCI subfunction support and
representor names with pattern like pf0sf1. This pattern
was not recognized by PMD and the first found subfunction
representor was considered as master device.

This patch supports representor name parsing for SF,
and SF representors are just ignored by PMD (as there is
no support for SF in 20.11-LTS release).

Signed-off-by: Xueming Li <xuemingl at nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo at nvidia.com>
---
 drivers/common/mlx5/linux/mlx5_common_os.c | 32 +++++++++++++++-------
 drivers/common/mlx5/linux/mlx5_nl.c        |  3 ++
 drivers/common/mlx5/mlx5_common.h          |  2 ++
 drivers/net/mlx5/linux/mlx5_ethdev_os.c    |  3 ++
 4 files changed, 30 insertions(+), 10 deletions(-)

diff --git a/drivers/common/mlx5/linux/mlx5_common_os.c b/drivers/common/mlx5/linux/mlx5_common_os.c
index 0edd78ea6d..5cf9576921 100644
--- a/drivers/common/mlx5/linux/mlx5_common_os.c
+++ b/drivers/common/mlx5/linux/mlx5_common_os.c
@@ -97,22 +97,34 @@ void
 mlx5_translate_port_name(const char *port_name_in,
 			 struct mlx5_switch_info *port_info_out)
 {
-	char pf_c1, pf_c2, vf_c1, vf_c2, eol;
+	char ctrl = 0, pf_c1, pf_c2, vf_c1, vf_c2, eol;
 	char *end;
 	int sc_items;
 
-	/*
-	 * Check for port-name as a string of the form pf0vf0
-	 * (support kernel ver >= 5.0 or OFED ver >= 4.6).
-	 */
+	sc_items = sscanf(port_name_in, "%c%d",
+			  &ctrl, &port_info_out->ctrl_num);
+	if (sc_items == 2 && ctrl == 'c') {
+		port_name_in++; /* 'c' */
+		port_name_in += snprintf(NULL, 0, "%d",
+					  port_info_out->ctrl_num);
+	}
+	/* Check for port-name as a string of the form pf0vf0 or pf0sf0 */
 	sc_items = sscanf(port_name_in, "%c%c%d%c%c%d%c",
 			  &pf_c1, &pf_c2, &port_info_out->pf_num,
 			  &vf_c1, &vf_c2, &port_info_out->port_name, &eol);
-	if (sc_items == 6 &&
-	    pf_c1 == 'p' && pf_c2 == 'f' &&
-	    vf_c1 == 'v' && vf_c2 == 'f') {
-		port_info_out->name_type = MLX5_PHYS_PORT_NAME_TYPE_PFVF;
-		return;
+	if (sc_items == 6 && pf_c1 == 'p' && pf_c2 == 'f') {
+		if (vf_c1 == 'v' && vf_c2 == 'f') {
+			/* Kernel ver >= 5.0 or OFED ver >= 4.6 */
+			port_info_out->name_type =
+					MLX5_PHYS_PORT_NAME_TYPE_PFVF;
+			return;
+		}
+		if (vf_c1 == 's' && vf_c2 == 'f') {
+			/* Kernel ver >= 5.11 or OFED ver >= 5.1 */
+			port_info_out->name_type =
+					MLX5_PHYS_PORT_NAME_TYPE_PFSF;
+			return;
+		}
 	}
 	/*
 	 * Check for port-name as a string of the form p0
diff --git a/drivers/common/mlx5/linux/mlx5_nl.c b/drivers/common/mlx5/linux/mlx5_nl.c
index 1f765dca07..145e354b2c 100644
--- a/drivers/common/mlx5/linux/mlx5_nl.c
+++ b/drivers/common/mlx5/linux/mlx5_nl.c
@@ -789,6 +789,7 @@ mlx5_nl_mac_addr_sync(int nlsk_fd, unsigned int iface_idx,
 	int i;
 	int ret;
 
+	memset(macs, 0, n * sizeof(macs[0]));
 	ret = mlx5_nl_mac_addr_list(nlsk_fd, iface_idx, &macs, &macs_n);
 	if (ret)
 		return;
@@ -1201,6 +1202,8 @@ mlx5_nl_check_switch_info(bool num_vf_set,
 	case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
 		/* Fallthrough */
 	case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
+		/* Fallthrough */
+	case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
 		/* New representors naming schema. */
 		switch_info->representor = 1;
 		break;
diff --git a/drivers/common/mlx5/mlx5_common.h b/drivers/common/mlx5/mlx5_common.h
index a484b74b9c..4c75addd08 100644
--- a/drivers/common/mlx5/mlx5_common.h
+++ b/drivers/common/mlx5/mlx5_common.h
@@ -153,6 +153,7 @@ enum mlx5_nl_phys_port_name_type {
 	MLX5_PHYS_PORT_NAME_TYPE_UPLINK, /* p0, kernel ver >= 5.0 */
 	MLX5_PHYS_PORT_NAME_TYPE_PFVF, /* pf0vf0, kernel ver >= 5.0 */
 	MLX5_PHYS_PORT_NAME_TYPE_PFHPF, /* pf0, kernel ver >= 5.7, HPF rep */
+	MLX5_PHYS_PORT_NAME_TYPE_PFSF, /* pf0sf0, kernel ver >= 5.0 */
 	MLX5_PHYS_PORT_NAME_TYPE_UNKNOWN, /* Unrecognized. */
 };
 
@@ -161,6 +162,7 @@ struct mlx5_switch_info {
 	uint32_t master:1; /**< Master device. */
 	uint32_t representor:1; /**< Representor device. */
 	enum mlx5_nl_phys_port_name_type name_type; /** < Port name type. */
+	int32_t ctrl_num; /**< Controller number (valid for c#pf#vf# format). */
 	int32_t pf_num; /**< PF number (valid for pfxvfx format only). */
 	int32_t port_name; /**< Representor port name. */
 	uint64_t switch_id; /**< Switch identifier. */
diff --git a/drivers/net/mlx5/linux/mlx5_ethdev_os.c b/drivers/net/mlx5/linux/mlx5_ethdev_os.c
index f641cb936e..08b51b7dc8 100644
--- a/drivers/net/mlx5/linux/mlx5_ethdev_os.c
+++ b/drivers/net/mlx5/linux/mlx5_ethdev_os.c
@@ -1013,6 +1013,9 @@ mlx5_sysfs_check_switch_info(bool device_dir,
 		/* New representors naming schema. */
 		switch_info->representor = 1;
 		break;
+	default:
+		switch_info->master = device_dir;
+		break;
 	}
 }
 
-- 
2.33.0

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2021-11-10 14:17:10.644954958 +0800
+++ 0197-common-mlx5-fix-physical-port-name-recognition.patch	2021-11-10 14:17:02.007411639 +0800
@@ -1 +1 @@
-From 59df97f1a832a0edfd7f77ffbe5149e553e860b5 Mon Sep 17 00:00:00 2001
+From c4e68962efd30f3b4722bf4ad055d592141db69d Mon Sep 17 00:00:00 2001
@@ -3,14 +3,20 @@
-Date: Sun, 28 Mar 2021 13:48:07 +0000
-Subject: [PATCH] common/mlx5: support sub-function representor parsing
-
-This patch supports representor name parsing for SF.
-In sysfs, representor name stored under "phys_port_name" sysfs key,
-similar to VF representor, switch port name of SF representor is
-"pf<x>sf<y>".
-
-For netlink message, net SF type is supported.
-
-Examples:
-
-pf0sf1
-pf0sf[0-3]
+Date: Wed, 3 Nov 2021 11:18:36 +0200
+Subject: [PATCH] common/mlx5: fix physical port name recognition
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit 59df97f1a832a0edfd7f77ffbe5149e553e860b5 ]
+
+While device probing mlx5 PMD get the physical port name
+and checks against the set of patterns. If there is no
+any pattern match, the driver assumes the port belongs
+to PF device, this behaviour provides compatibility with
+legacy kernel drivers (before and early SR-IOV support).
+
+The newer kernels added the PCI subfunction support and
+representor names with pattern like pf0sf1. This pattern
+was not recognized by PMD and the first found subfunction
+representor was considered as master device.
+
+This patch supports representor name parsing for SF,
+and SF representors are just ignored by PMD (as there is
+no support for SF in 20.11-LTS release).
@@ -77 +83 @@
-index ef7a521379..752c57b33d 100644
+index 1f765dca07..145e354b2c 100644
@@ -80 +86 @@
-@@ -746,6 +746,7 @@ mlx5_nl_mac_addr_sync(int nlsk_fd, unsigned int iface_idx,
+@@ -789,6 +789,7 @@ mlx5_nl_mac_addr_sync(int nlsk_fd, unsigned int iface_idx,
@@ -88 +94 @@
-@@ -1158,6 +1159,8 @@ mlx5_nl_check_switch_info(bool num_vf_set,
+@@ -1201,6 +1202,8 @@ mlx5_nl_check_switch_info(bool num_vf_set,
@@ -98 +104 @@
-index 5028a05b49..8eda6749b4 100644
+index a484b74b9c..4c75addd08 100644
@@ -101 +107 @@
-@@ -151,6 +151,7 @@ enum mlx5_nl_phys_port_name_type {
+@@ -153,6 +153,7 @@ enum mlx5_nl_phys_port_name_type {
@@ -109 +115 @@
-@@ -159,6 +160,7 @@ struct mlx5_switch_info {
+@@ -161,6 +162,7 @@ struct mlx5_switch_info {
@@ -118 +124 @@
-index 0e8de9439e..cb692b22f2 100644
+index f641cb936e..08b51b7dc8 100644


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