[dpdk-stable] patch 'net/mlx5: remove duplicated reference of Tx doorbell' has been queued to stable release 20.11.4

Xueming Li xuemingl at nvidia.com
Wed Nov 10 07:32:08 CET 2021
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Hi,

FYI, your patch has been queued to stable release 20.11.4

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 11/12/21. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/steevenlee/dpdk

This queued commit can be viewed at:
https://github.com/steevenlee/dpdk/commit/3851aac989fbb60bb07355b51ab7207e9976e84c

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From 3851aac989fbb60bb07355b51ab7207e9976e84c Mon Sep 17 00:00:00 2001
From: Michael Baum <michaelba at nvidia.com>
Date: Wed, 3 Nov 2021 20:35:12 +0200
Subject: [PATCH] net/mlx5: remove duplicated reference of Tx doorbell
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit b6e9c33c82582bf88c90220e3a8c1f6a8ace843f ]

The Tx doorbell has different virtual addresses per process.
The secondary process takes the UAR physical page ID of the primary and
mmap it to its own virtual address.
The primary doorbell references were saved in two shared memory
locations: the TxQ structure and a dedicated doorbell array.

Remove the doorbell reference from the TxQ structure and move the
primary processes to take the UAR information from the primary doorbell
array.

Signed-off-by: Michael Baum <michaelba at nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo at nvidia.com>
Acked-by: Matan Azrad <matan at nvidia.com>
---
 drivers/net/mlx5/linux/mlx5_verbs.c |  6 ++----
 drivers/net/mlx5/mlx5.c             |  2 ++
 drivers/net/mlx5/mlx5.h             |  2 +-
 drivers/net/mlx5/mlx5_devx.c        |  8 ++------
 drivers/net/mlx5/mlx5_rxtx.h        |  2 +-
 drivers/net/mlx5/mlx5_txq.c         | 15 ++++++++-------
 6 files changed, 16 insertions(+), 19 deletions(-)

diff --git a/drivers/net/mlx5/linux/mlx5_verbs.c b/drivers/net/mlx5/linux/mlx5_verbs.c
index 689c523ec8..95e8eb06d1 100644
--- a/drivers/net/mlx5/linux/mlx5_verbs.c
+++ b/drivers/net/mlx5/linux/mlx5_verbs.c
@@ -1027,20 +1027,18 @@ mlx5_txq_ibv_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 		}
 	}
 #endif
-	txq_ctrl->bf_reg = qp.bf.reg;
 	if (qp.comp_mask & MLX5DV_QP_MASK_UAR_MMAP_OFFSET) {
 		txq_ctrl->uar_mmap_offset = qp.uar_mmap_offset;
 		DRV_LOG(DEBUG, "Port %u: uar_mmap_offset 0x%" PRIx64 ".",
 			dev->data->port_id, txq_ctrl->uar_mmap_offset);
 	} else {
 		DRV_LOG(ERR,
-			"Port %u failed to retrieve UAR info, invalid"
-			" libmlx5.so",
+			"Port %u failed to retrieve UAR info, invalid libmlx5.so",
 			dev->data->port_id);
 		rte_errno = EINVAL;
 		goto error;
 	}
-	txq_uar_init(txq_ctrl);
+	txq_uar_init(txq_ctrl, qp.bf.reg);
 	dev->data->tx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED;
 	return 0;
 error:
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index ef1308ffc1..d094e9e423 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1265,6 +1265,8 @@ mlx5_proc_priv_init(struct rte_eth_dev *dev)
 	}
 	ppriv->uar_table_sz = priv->txqs_n;
 	dev->process_private = ppriv;
+	if (rte_eal_process_type() == RTE_PROC_PRIMARY)
+		priv->sh->pppriv = ppriv;
 	return 0;
 }
 
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 7e984f8438..4b0a97f246 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -753,6 +753,7 @@ struct mlx5_dev_ctx_shared {
 	struct mlx5_devx_obj *tis; /* TIS object. */
 	struct mlx5_devx_obj *td; /* Transport domain. */
 	void *tx_uar; /* Tx/packet pacing shared UAR. */
+	struct mlx5_proc_priv *pppriv; /* Pointer to primary private process. */
 	struct mlx5_flex_parser_profiles fp[MLX5_FLEX_PARSER_MAX];
 	/* Flex parser profiles information. */
 	void *devx_rx_uar; /* DevX UAR for Rx. */
@@ -1050,7 +1051,6 @@ void mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
 void mlx5_set_metadata_mask(struct rte_eth_dev *dev);
 int mlx5_dev_check_sibling_config(struct mlx5_priv *priv,
 				  struct mlx5_dev_config *config);
-int mlx5_dev_configure(struct rte_eth_dev *dev);
 int mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info);
 int mlx5_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size);
 int mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu);
diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c
index 8add3b2cac..ac1939415b 100644
--- a/drivers/net/mlx5/mlx5_devx.c
+++ b/drivers/net/mlx5/mlx5_devx.c
@@ -1432,7 +1432,6 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 #else
 	struct mlx5_dev_ctx_shared *sh = priv->sh;
 	struct mlx5_txq_obj *txq_obj = txq_ctrl->obj;
-	void *reg_addr;
 	uint32_t cqe_n, log_desc_n;
 	uint32_t wqe_n, wqe_size;
 	int ret = 0;
@@ -1516,13 +1515,10 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 	if (!priv->sh->tdn)
 		priv->sh->tdn = priv->sh->td->id;
 #endif
-	MLX5_ASSERT(sh->tx_uar);
-	reg_addr = mlx5_os_get_devx_uar_reg_addr(sh->tx_uar);
-	MLX5_ASSERT(reg_addr);
-	txq_ctrl->bf_reg = reg_addr;
+	MLX5_ASSERT(sh->tx_uar && mlx5_os_get_devx_uar_reg_addr(sh->tx_uar));
 	txq_ctrl->uar_mmap_offset =
 				mlx5_os_get_devx_uar_mmap_offset(sh->tx_uar);
-	txq_uar_init(txq_ctrl);
+	txq_uar_init(txq_ctrl, mlx5_os_get_devx_uar_reg_addr(sh->tx_uar));
 	dev->data->tx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED;
 	return 0;
 error:
diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index 7c3c4c0099..4d043d2015 100644
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -397,7 +397,7 @@ int mlx5_tx_hairpin_queue_setup
 	(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
 	 const struct rte_eth_hairpin_conf *hairpin_conf);
 void mlx5_tx_queue_release(void *dpdk_txq);
-void txq_uar_init(struct mlx5_txq_ctrl *txq_ctrl);
+void txq_uar_init(struct mlx5_txq_ctrl *txq_ctrl, void *bf_reg);
 int mlx5_tx_uar_init_secondary(struct rte_eth_dev *dev, int fd);
 void mlx5_tx_uar_uninit_secondary(struct rte_eth_dev *dev);
 int mlx5_txq_obj_verify(struct rte_eth_dev *dev);
diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
index 5f1a179df3..f3516a8a5a 100644
--- a/drivers/net/mlx5/mlx5_txq.c
+++ b/drivers/net/mlx5/mlx5_txq.c
@@ -526,9 +526,11 @@ txq_uar_ncattr_init(struct mlx5_txq_ctrl *txq_ctrl, size_t page_size)
  *
  * @param txq_ctrl
  *   Pointer to Tx queue control structure.
+ * @param bf_reg
+ *   BlueFlame register from Verbs UAR.
  */
 void
-txq_uar_init(struct mlx5_txq_ctrl *txq_ctrl)
+txq_uar_init(struct mlx5_txq_ctrl *txq_ctrl, void *bf_reg)
 {
 	struct mlx5_priv *priv = txq_ctrl->priv;
 	struct mlx5_proc_priv *ppriv = MLX5_PROC_PRIV(PORT_ID(priv));
@@ -545,7 +547,7 @@ txq_uar_init(struct mlx5_txq_ctrl *txq_ctrl)
 		return;
 	MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
 	MLX5_ASSERT(ppriv);
-	ppriv->uar_table[txq_ctrl->txq.idx] = txq_ctrl->bf_reg;
+	ppriv->uar_table[txq_ctrl->txq.idx] = bf_reg;
 	txq_uar_ncattr_init(txq_ctrl, page_size);
 #ifndef RTE_ARCH_64
 	/* Assign an UAR lock according to UAR page number */
@@ -574,6 +576,7 @@ txq_uar_init_secondary(struct mlx5_txq_ctrl *txq_ctrl, int fd)
 {
 	struct mlx5_priv *priv = txq_ctrl->priv;
 	struct mlx5_proc_priv *ppriv = MLX5_PROC_PRIV(PORT_ID(priv));
+	struct mlx5_proc_priv *primary_ppriv = priv->sh->pppriv;
 	struct mlx5_txq_data *txq = &txq_ctrl->txq;
 	void *addr;
 	uintptr_t uar_va;
@@ -592,20 +595,18 @@ txq_uar_init_secondary(struct mlx5_txq_ctrl *txq_ctrl, int fd)
 	 * As rdma-core, UARs are mapped in size of OS page
 	 * size. Ref to libmlx5 function: mlx5_init_context()
 	 */
-	uar_va = (uintptr_t)txq_ctrl->bf_reg;
+	uar_va = (uintptr_t)primary_ppriv->uar_table[txq->idx];
 	offset = uar_va & (page_size - 1); /* Offset in page. */
 	addr = rte_mem_map(NULL, page_size, RTE_PROT_WRITE, RTE_MAP_SHARED,
-			    fd, txq_ctrl->uar_mmap_offset);
+			   fd, txq_ctrl->uar_mmap_offset);
 	if (!addr) {
-		DRV_LOG(ERR,
-			"port %u mmap failed for BF reg of txq %u",
+		DRV_LOG(ERR, "Port %u mmap failed for BF reg of txq %u.",
 			txq->port_id, txq->idx);
 		rte_errno = ENXIO;
 		return -rte_errno;
 	}
 	addr = RTE_PTR_ADD(addr, offset);
 	ppriv->uar_table[txq->idx] = addr;
-	txq_uar_ncattr_init(txq_ctrl, page_size);
 	return 0;
 }
 
-- 
2.33.0

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2021-11-10 14:17:12.625001650 +0800
+++ 0244-net-mlx5-remove-duplicated-reference-of-Tx-doorbell.patch	2021-11-10 14:17:02.087410985 +0800
@@ -1 +1 @@
-From b6e9c33c82582bf88c90220e3a8c1f6a8ace843f Mon Sep 17 00:00:00 2001
+From 3851aac989fbb60bb07355b51ab7207e9976e84c Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit b6e9c33c82582bf88c90220e3a8c1f6a8ace843f ]
@@ -16,2 +18,0 @@
-Cc: stable at dpdk.org
-
@@ -26 +27 @@
- drivers/net/mlx5/mlx5_tx.h          |  3 +--
+ drivers/net/mlx5/mlx5_rxtx.h        |  2 +-
@@ -28 +29 @@
- 6 files changed, 16 insertions(+), 20 deletions(-)
+ 6 files changed, 16 insertions(+), 19 deletions(-)
@@ -31 +32 @@
-index 9d29954261..0ae1ea1e5c 100644
+index 689c523ec8..95e8eb06d1 100644
@@ -34 +35 @@
-@@ -1017,20 +1017,18 @@ mlx5_txq_ibv_obj_new(struct rte_eth_dev *dev, uint16_t idx)
+@@ -1027,20 +1027,18 @@ mlx5_txq_ibv_obj_new(struct rte_eth_dev *dev, uint16_t idx)
@@ -58 +59 @@
-index 9c8d1cc76f..55596d27d2 100644
+index ef1308ffc1..d094e9e423 100644
@@ -61 +62 @@
-@@ -1620,6 +1620,8 @@ mlx5_proc_priv_init(struct rte_eth_dev *dev)
+@@ -1265,6 +1265,8 @@ mlx5_proc_priv_init(struct rte_eth_dev *dev)
@@ -71 +72 @@
-index 9307a4f95b..22a21f1e5f 100644
+index 7e984f8438..4b0a97f246 100644
@@ -74 +75,2 @@
-@@ -1206,6 +1206,7 @@ struct mlx5_dev_ctx_shared {
+@@ -753,6 +753,7 @@ struct mlx5_dev_ctx_shared {
+ 	struct mlx5_devx_obj *tis; /* TIS object. */
@@ -76 +77,0 @@
- 	struct mlx5_lag lag; /* LAG attributes */
@@ -79 +80 @@
- 	struct mlx5_ecpri_parser_profile ecpri_parser;
+ 	struct mlx5_flex_parser_profiles fp[MLX5_FLEX_PARSER_MAX];
@@ -82 +83,2 @@
-@@ -1528,7 +1529,6 @@ void mlx5_set_metadata_mask(struct rte_eth_dev *dev);
+@@ -1050,7 +1051,6 @@ void mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
+ void mlx5_set_metadata_mask(struct rte_eth_dev *dev);
@@ -84,2 +86 @@
- 				  struct mlx5_dev_config *config,
- 				  struct rte_device *dpdk_dev);
+ 				  struct mlx5_dev_config *config);
@@ -91 +92 @@
-index e46f79124d..07305ca942 100644
+index 8add3b2cac..ac1939415b 100644
@@ -94,4 +95,4 @@
-@@ -1244,7 +1244,6 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
- 	struct mlx5_devx_cq_attr cq_attr = {
- 		.uar_page_id = mlx5_os_get_devx_uar_page_id(sh->tx_uar),
- 	};
+@@ -1432,7 +1432,6 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
+ #else
+ 	struct mlx5_dev_ctx_shared *sh = priv->sh;
+ 	struct mlx5_txq_obj *txq_obj = txq_ctrl->obj;
@@ -102 +103 @@
-@@ -1341,13 +1340,10 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
+@@ -1516,13 +1515,10 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
@@ -118,13 +119,5 @@
-diff --git a/drivers/net/mlx5/mlx5_tx.h b/drivers/net/mlx5/mlx5_tx.h
-index 0b9109a115..02441ef34d 100644
---- a/drivers/net/mlx5/mlx5_tx.h
-+++ b/drivers/net/mlx5/mlx5_tx.h
-@@ -184,7 +184,6 @@ struct mlx5_txq_ctrl {
- 	struct mlx5_txq_obj *obj; /* Verbs/DevX queue object. */
- 	struct mlx5_priv *priv; /* Back pointer to private data. */
- 	off_t uar_mmap_offset; /* UAR mmap offset for non-primary process. */
--	void *bf_reg; /* BlueFlame register from Verbs. */
- 	uint16_t dump_file_n; /* Number of dump files. */
- 	struct rte_eth_hairpin_conf hairpin_conf; /* Hairpin configuration. */
- 	uint32_t hairpin_status; /* Hairpin binding status. */
-@@ -204,7 +203,7 @@ int mlx5_tx_hairpin_queue_setup
+diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
+index 7c3c4c0099..4d043d2015 100644
+--- a/drivers/net/mlx5/mlx5_rxtx.h
++++ b/drivers/net/mlx5/mlx5_rxtx.h
+@@ -397,7 +397,7 @@ int mlx5_tx_hairpin_queue_setup
@@ -133 +126 @@
- void mlx5_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid);
+ void mlx5_tx_queue_release(void *dpdk_txq);
@@ -140 +133 @@
-index e9ab7fa266..820421f7cd 100644
+index 5f1a179df3..f3516a8a5a 100644
@@ -143 +136 @@
-@@ -523,9 +523,11 @@ txq_uar_ncattr_init(struct mlx5_txq_ctrl *txq_ctrl, size_t page_size)
+@@ -526,9 +526,11 @@ txq_uar_ncattr_init(struct mlx5_txq_ctrl *txq_ctrl, size_t page_size)
@@ -156 +149 @@
-@@ -542,7 +544,7 @@ txq_uar_init(struct mlx5_txq_ctrl *txq_ctrl)
+@@ -545,7 +547,7 @@ txq_uar_init(struct mlx5_txq_ctrl *txq_ctrl)
@@ -165 +158 @@
-@@ -571,6 +573,7 @@ txq_uar_init_secondary(struct mlx5_txq_ctrl *txq_ctrl, int fd)
+@@ -574,6 +576,7 @@ txq_uar_init_secondary(struct mlx5_txq_ctrl *txq_ctrl, int fd)
@@ -173 +166 @@
-@@ -589,20 +592,18 @@ txq_uar_init_secondary(struct mlx5_txq_ctrl *txq_ctrl, int fd)
+@@ -592,20 +595,18 @@ txq_uar_init_secondary(struct mlx5_txq_ctrl *txq_ctrl, int fd)
Previous message (by thread): [dpdk-stable] patch 'common/mlx5: fix UAR allocation diagnostics messages' has been queued to stable release 20.11.4
Next message (by thread): [dpdk-stable] patch 'kni: check error code of allmulticast mode switch' has been queued to stable release 20.11.4
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