patch 'net/iavf: count continuous DD bits for Arm in flex Rx' has been queued to stable release 20.11.5

[luca.boccassi at gmail.com]

Hi,

FYI, your patch has been queued to stable release 20.11.5

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 02/20/22. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/bluca/dpdk-stable

This queued commit can be viewed at:
https://github.com/bluca/dpdk-stable/commit/da0833ea1f2be8c1aa0c1f4994486fd76d8d2a74

Thanks.

Luca Boccassi

---
>From da0833ea1f2be8c1aa0c1f4994486fd76d8d2a74 Mon Sep 17 00:00:00 2001
From: Kathleen Capella <kathleen.capella at arm.com>
Date: Sat, 5 Feb 2022 00:26:30 +0000
Subject: [PATCH] net/iavf: count continuous DD bits for Arm in flex Rx

[ upstream commit 32e38011fc35625efdd74dc83edf7e53c54ef13e ]

On Arm platforms, reading of descriptors may be re-ordered causing the
status of DD bits to be discontinuous. Add logic to only process
continuous descriptors by checking DD bits.

Fixes: b8b4c54ef9b0 ("net/iavf: support flexible Rx descriptor in normal path")

Signed-off-by: Kathleen Capella <kathleen.capella at arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli at arm.com>
Reviewed-by: Qi Zhang <qi.z.zhang at intel.com>
---
 drivers/net/iavf/iavf_rxtx.c | 26 ++++++++++++++++++++++----
 1 file changed, 22 insertions(+), 4 deletions(-)

diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c
index dfc3f906ee..c2a9c4f37b 100644
--- a/drivers/net/iavf/iavf_rxtx.c
+++ b/drivers/net/iavf/iavf_rxtx.c
@@ -1637,7 +1637,7 @@ iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq)
 	struct rte_mbuf *mb;
 	uint16_t stat_err0;
 	uint16_t pkt_len;
-	int32_t s[IAVF_LOOK_AHEAD], nb_dd;
+	int32_t s[IAVF_LOOK_AHEAD], var, nb_dd;
 	int32_t i, j, nb_rx = 0;
 	uint64_t pkt_flags;
 	const uint32_t *ptype_tbl = rxq->vsi->adapter->ptype_tbl;
@@ -1662,9 +1662,27 @@ iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq)
 
 		rte_smp_rmb();
 
-		/* Compute how many status bits were set */
-		for (j = 0, nb_dd = 0; j < IAVF_LOOK_AHEAD; j++)
-			nb_dd += s[j] & (1 << IAVF_RX_FLEX_DESC_STATUS0_DD_S);
+		/* Compute how many contiguous DD bits were set */
+		for (j = 0, nb_dd = 0; j < IAVF_LOOK_AHEAD; j++) {
+			var = s[j] & (1 << IAVF_RX_FLEX_DESC_STATUS0_DD_S);
+#ifdef RTE_ARCH_ARM
+			/* For Arm platforms, count only contiguous descriptors
+			 * whose DD bit is set to 1. On Arm platforms, reads of
+			 * descriptors can be reordered. Since the CPU may
+			 * be reading the descriptors as the NIC updates them
+			 * in memory, it is possbile that the DD bit for a
+			 * descriptor earlier in the queue is read as not set
+			 * while the DD bit for a descriptor later in the queue
+			 * is read as set.
+			 */
+			if (var)
+				nb_dd += 1;
+			else
+				break;
+#else
+			nb_dd += var;
+#endif
+		}
 
 		nb_rx += nb_dd;
 
-- 
2.30.2

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2022-02-18 12:37:42.087784974 +0000
+++ 0113-net-iavf-count-continuous-DD-bits-for-Arm-in-flex-Rx.patch	2022-02-18 12:37:37.854795583 +0000
@@ -1 +1 @@
-From 32e38011fc35625efdd74dc83edf7e53c54ef13e Mon Sep 17 00:00:00 2001
+From da0833ea1f2be8c1aa0c1f4994486fd76d8d2a74 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 32e38011fc35625efdd74dc83edf7e53c54ef13e ]
+
@@ -11 +12,0 @@
-Cc: stable at dpdk.org
@@ -21 +22 @@
-index f07d886821..41244055e5 100644
+index dfc3f906ee..c2a9c4f37b 100644
@@ -24 +25 @@
-@@ -1818,7 +1818,7 @@ iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq)
+@@ -1637,7 +1637,7 @@ iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq)
@@ -33 +34 @@
-@@ -1843,9 +1843,27 @@ iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq)
+@@ -1662,9 +1662,27 @@ iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq)