Hi,
FYI, your patch has been queued to stable release 20.11.5
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 03/11/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/bluca/dpdk-stable
This queued commit can be viewed at:
https://github.com/bluca/dpdk-stable/commit/f400875c4e06f9932276c0c098ee3669bc7a43fb
Thanks.
Luca Boccassi
---
>From f400875c4e06f9932276c0c098ee3669bc7a43fb Mon Sep 17 00:00:00 2001
From: Jiawei Wang <jiaweiw at nvidia.com>
Date: Wed, 2 Mar 2022 17:30:51 +0200
Subject: [PATCH] net/mlx5: fix NIC egress flow mismatch in switchdev mode
[ upstream commit 6d4f1066be6cd60a95f21ef07a16a3c3676c5cd9 ]
When E-Switch mode was enabled, the NIC egress flows was implicitly
appended with source vport to match on. If the metadata register C0
was used to maintain the source vport, it was initialized to zero
on packet steering engine entry, the flow could be hit only
if source vport was zero, the register C0 of the packet was not correct
to match in the TX side, this caused egress flow misses.
This patch:
- removes the implicit source vport match for NIC egress flow.
- rejects the NIC egress flows on the representor ports at validation.
- allows the internal NIC egress flows containing the TX_QUEUE items in
order to not impact hairpins.
Fixes: ce777b147bf8 ("net/mlx5: fix E-Switch flow without port item")
Signed-off-by: Jiawei Wang <jiaweiw at nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo at nvidia.com>
Acked-by: Ori Kam <orika at nvidia.com>
---
doc/guides/nics/mlx5.rst | 2 ++
drivers/net/mlx5/mlx5_flow_dv.c | 26 +++++++++++++++++++++-----
2 files changed, 23 insertions(+), 5 deletions(-)
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index b1b9d6f4e3..d76c3178dc 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -352,6 +352,8 @@ Limitations
from the reference "Clock Queue" completions,
the scheduled send timestamps should not be specified with non-zero MSB.
+- The NIC egress flow rules on representor port are not supported.
+
Statistics
----------
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 4e87f7a952..44f975c9c9 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -5611,8 +5611,10 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
return ret;
last_item = MLX5_FLOW_ITEM_TAG;
break;
- case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
+ last_item = MLX5_FLOW_ITEM_TX_QUEUE;
+ break;
+ case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
break;
case RTE_FLOW_ITEM_TYPE_GTP:
ret = flow_dv_validate_item_gtp(dev, items, item_flags,
@@ -6273,6 +6275,18 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
NULL, "too many header modify"
" actions to support");
}
+ /*
+ * Validation the NIC Egress flow on representor, except implicit
+ * hairpin default egress flow with TX_QUEUE item, other flows not
+ * work due to metadata regC0 mismatch.
+ */
+ if ((!attr->transfer && attr->egress) && priv->representor &&
+ !(item_flags & MLX5_FLOW_ITEM_TX_QUEUE))
+ return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ITEM,
+ NULL,
+ "NIC egress rules on representors"
+ " is not supported");
return 0;
}
@@ -10663,12 +10677,14 @@ flow_dv_translate(struct rte_eth_dev *dev,
/*
* When E-Switch mode is enabled, we have two cases where we need to
* set the source port manually.
- * The first one, is in case of Nic steering rule, and the second is
- * E-Switch rule where no port_id item was found. In both cases
- * the source port is set according the current port in use.
+ * The first one, is in case of NIC ingress steering rule, and the
+ * second is E-Switch rule where no port_id item was found.
+ * In both cases the source port is set according the current port
+ * in use.
*/
if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
- (priv->representor || priv->master)) {
+ (priv->representor || priv->master) &&
+ !(attr->egress && !attr->transfer)) {
if (flow_dv_translate_item_port_id(dev, match_mask,
match_value, NULL, attr))
return -rte_errno;
--
2.30.2
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-03-09 16:30:09.707043643 +0000
+++ 0032-net-mlx5-fix-NIC-egress-flow-mismatch-in-switchdev-m.patch 2022-03-09 16:30:08.599026318 +0000
@@ -1 +1 @@
-From 6d4f1066be6cd60a95f21ef07a16a3c3676c5cd9 Mon Sep 17 00:00:00 2001
+From f400875c4e06f9932276c0c098ee3669bc7a43fb Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 6d4f1066be6cd60a95f21ef07a16a3c3676c5cd9 ]
+
@@ -20 +21,0 @@
-Cc: stable at dpdk.org
@@ -31 +32 @@
-index c31a154181..2fe5784c04 100644
+index b1b9d6f4e3..d76c3178dc 100644
@@ -34,3 +35,3 @@
-@@ -504,6 +504,8 @@ Limitations
-
- Matching on checksum and sequence needs OFED 5.6+.
+@@ -352,6 +352,8 @@ Limitations
+ from the reference "Clock Queue" completions,
+ the scheduled send timestamps should not be specified with non-zero MSB.
@@ -40 +40,0 @@
-
@@ -42,0 +43 @@
+
@@ -44 +45 @@
-index ebd0a427f3..34d2c7a99f 100644
+index 4e87f7a952..44f975c9c9 100644
@@ -47 +48 @@
-@@ -7235,8 +7235,10 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
+@@ -5611,8 +5611,10 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
@@ -59,4 +60,4 @@
-@@ -8069,6 +8071,18 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
- return rte_flow_error_set(error, EINVAL,
- RTE_FLOW_ERROR_TYPE_ACTION, NULL,
- "sample before modify action is not supported");
+@@ -6273,6 +6275,18 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
+ NULL, "too many header modify"
+ " actions to support");
+ }
@@ -78 +79 @@
-@@ -13758,11 +13772,13 @@ flow_dv_translate(struct rte_eth_dev *dev,
+@@ -10663,12 +10677,14 @@ flow_dv_translate(struct rte_eth_dev *dev,
@@ -90,2 +91,3 @@
-- if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) && priv->sh->esw_mode) {
-+ if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) && priv->sh->esw_mode &&
+ if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
+- (priv->representor || priv->master)) {
++ (priv->representor || priv->master) &&