patch 'compress/mlx5: fix output Adler-32 checksum offset' has been queued to stable release 22.11.2

Xueming Li xuemingl at nvidia.com
Sun Apr 9 17:23:29 CEST 2023


Hi,

FYI, your patch has been queued to stable release 22.11.2

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 04/11/23. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://git.dpdk.org/dpdk-stable/log/?h=22.11-staging

This queued commit can be viewed at:
https://git.dpdk.org/dpdk-stable/log/?h=22.11-staging/commit/2a091b2f313b48586a31585f278d14e9938ef6d3

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From 2a091b2f313b48586a31585f278d14e9938ef6d3 Mon Sep 17 00:00:00 2001
From: Michael Baum <michaelba at nvidia.com>
Date: Tue, 21 Feb 2023 09:07:50 +0200
Subject: [PATCH] compress/mlx5: fix output Adler-32 checksum offset
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit d54dd89f49ded1e2d8d0e83710b2347a5de4d7f5 ]

After de/compress dequeue, the output checksum is copied into the op
structure. The "output_checksum" field in op structure is "uint64_t"
type, and the 32-bit checksums (CRC32, Adler-32) are copied into the
lower 32 bits.

When both CRC32 and Adler-32 are configured, CRC32 is copied into the
lower 32 bits and Adler-32 into the upper 32 bits.
However, in mlx5 PMD Adler-32 without CRC, is mistakenly copied into the
upper 32 bits.

This patch updates Adler-32 output checksum to be copied into the
lower 32 bits.

Fixes: f8c97babc9f4 ("compress/mlx5: add data-path functions")

Signed-off-by: Michael Baum <michaelba at nvidia.com>
Acked-by: Matan Azrad <matan at nvidia.com>
---
 drivers/compress/mlx5/mlx5_compress.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/compress/mlx5/mlx5_compress.c b/drivers/compress/mlx5/mlx5_compress.c
index cadff83f27..c46fb4eb89 100644
--- a/drivers/compress/mlx5/mlx5_compress.c
+++ b/drivers/compress/mlx5/mlx5_compress.c
@@ -633,7 +633,7 @@ mlx5_compress_dequeue_burst(void *queue_pair, struct rte_comp_op **ops,
 				break;
 			case RTE_COMP_CHECKSUM_ADLER32:
 				op->output_chksum = (uint64_t)rte_be_to_cpu_32
-					    (opaq[idx].adler32) << 32;
+						    (opaq[idx].adler32);
 				break;
 			case RTE_COMP_CHECKSUM_CRC32_ADLER32:
 				op->output_chksum = (uint64_t)rte_be_to_cpu_32
-- 
2.25.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2023-04-09 21:45:39.365897400 +0800
+++ 0021-compress-mlx5-fix-output-Adler-32-checksum-offset.patch	2023-04-09 21:45:38.599042200 +0800
@@ -1 +1 @@
-From d54dd89f49ded1e2d8d0e83710b2347a5de4d7f5 Mon Sep 17 00:00:00 2001
+From 2a091b2f313b48586a31585f278d14e9938ef6d3 Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit d54dd89f49ded1e2d8d0e83710b2347a5de4d7f5 ]
@@ -20 +22,0 @@
-Cc: stable at dpdk.org
@@ -29 +31 @@
-index 06d1ff5b95..82088a7b8c 100644
+index cadff83f27..c46fb4eb89 100644


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