patch 'net/cnxk: flush SQ before configuring MTU' has been queued to stable release 22.11.3

[Xueming Li]

Hi,

FYI, your patch has been queued to stable release 22.11.3

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 08/11/23. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://git.dpdk.org/dpdk-stable/log/?h=22.11-staging

This queued commit can be viewed at:
https://git.dpdk.org/dpdk-stable/commit/?h=22.11-staging&id=c98cf071f83b67bcdf858a835e059577eb794edb

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From c98cf071f83b67bcdf858a835e059577eb794edb Mon Sep 17 00:00:00 2001
From: Satha Rao <skoteshwar at marvell.com>
Date: Thu, 15 Jun 2023 01:04:23 -0400
Subject: [PATCH] net/cnxk: flush SQ before configuring MTU
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit b33bef500a50b750577e3028e7ae8aff08bf3ae9 ]

When try to configure MTU for lower value causes run time failure
due to old bigger packets enqueued. To avoid error interrupts better
to flush the all SQs of this port before configuring new MTU.

Fixes: 8589ec212e80 ("net/cnxk: support MTU set")

Signed-off-by: Satha Rao <skoteshwar at marvell.com>
---
 drivers/net/cnxk/cnxk_ethdev.h     |  1 +
 drivers/net/cnxk/cnxk_ethdev_ops.c | 47 ++++++++++++++++++++++++++++++
 2 files changed, 48 insertions(+)

diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
index 651ef45ea8..83d6e9398f 100644
--- a/drivers/net/cnxk/cnxk_ethdev.h
+++ b/drivers/net/cnxk/cnxk_ethdev.h
@@ -494,6 +494,7 @@ int cnxk_nix_probe(struct rte_pci_driver *pci_drv,
 		   struct rte_pci_device *pci_dev);
 int cnxk_nix_remove(struct rte_pci_device *pci_dev);
 int cnxk_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu);
+int cnxk_nix_sq_flush(struct rte_eth_dev *eth_dev);
 int cnxk_nix_mc_addr_list_configure(struct rte_eth_dev *eth_dev,
 				    struct rte_ether_addr *mc_addr_set,
 				    uint32_t nb_mc_addr);
diff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c
index 8f7287161b..7a7478cda8 100644
--- a/drivers/net/cnxk/cnxk_ethdev_ops.c
+++ b/drivers/net/cnxk/cnxk_ethdev_ops.c
@@ -463,6 +463,44 @@ cnxk_nix_mac_addr_del(struct rte_eth_dev *eth_dev, uint32_t index)
 	dev->dmac_filter_count--;
 }
 
+int
+cnxk_nix_sq_flush(struct rte_eth_dev *eth_dev)
+{
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	struct rte_eth_dev_data *data = eth_dev->data;
+	int i, rc = 0;
+
+	/* Flush all tx queues */
+	for (i = 0; i < eth_dev->data->nb_tx_queues; i++) {
+		struct roc_nix_sq *sq = &dev->sqs[i];
+
+		if (eth_dev->data->tx_queues[i] == NULL)
+			continue;
+
+		rc = roc_nix_tm_sq_aura_fc(sq, false);
+		if (rc) {
+			plt_err("Failed to disable sqb aura fc, rc=%d", rc);
+			goto exit;
+		}
+
+		/* Wait for sq entries to be flushed */
+		rc = roc_nix_tm_sq_flush_spin(sq);
+		if (rc) {
+			plt_err("Failed to drain sq, rc=%d\n", rc);
+			goto exit;
+		}
+		if (data->tx_queue_state[i] == RTE_ETH_QUEUE_STATE_STARTED) {
+			rc = roc_nix_tm_sq_aura_fc(sq, true);
+			if (rc) {
+				plt_err("Failed to enable sq aura fc, txq=%u, rc=%d", i, rc);
+				goto exit;
+			}
+		}
+	}
+exit:
+	return rc;
+}
+
 int
 cnxk_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
 {
@@ -506,6 +544,15 @@ cnxk_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
 		goto exit;
 	}
 
+	/* if new MTU was smaller than old one, then flush all SQs before MTU change */
+	if (old_frame_size > frame_size) {
+		if (data->dev_started) {
+			plt_err("Reducing MTU is not supported when device started");
+			goto exit;
+		}
+		cnxk_nix_sq_flush(eth_dev);
+	}
+
 	frame_size -= RTE_ETHER_CRC_LEN;
 
 	/* Update mtu on Tx */
-- 
2.25.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2023-08-09 21:51:19.460690600 +0800
+++ 0048-net-cnxk-flush-SQ-before-configuring-MTU.patch	2023-08-09 21:51:18.194352000 +0800
@@ -1 +1 @@
-From b33bef500a50b750577e3028e7ae8aff08bf3ae9 Mon Sep 17 00:00:00 2001
+From c98cf071f83b67bcdf858a835e059577eb794edb Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit b33bef500a50b750577e3028e7ae8aff08bf3ae9 ]
@@ -11 +13,0 @@
-Cc: stable at dpdk.org
@@ -20 +22 @@
-index 45dc72b609..ed531fb277 100644
+index 651ef45ea8..83d6e9398f 100644
@@ -23 +25 @@
-@@ -465,6 +465,7 @@ int cnxk_nix_probe(struct rte_pci_driver *pci_drv,
+@@ -494,6 +494,7 @@ int cnxk_nix_probe(struct rte_pci_driver *pci_drv,
@@ -32 +34 @@
-index bce6d59bbc..da5ee19c85 100644
+index 8f7287161b..7a7478cda8 100644
@@ -35 +37 @@
-@@ -495,6 +495,44 @@ cnxk_nix_mac_addr_del(struct rte_eth_dev *eth_dev, uint32_t index)
+@@ -463,6 +463,44 @@ cnxk_nix_mac_addr_del(struct rte_eth_dev *eth_dev, uint32_t index)
@@ -80 +82 @@
-@@ -538,6 +576,15 @@ cnxk_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
+@@ -506,6 +544,15 @@ cnxk_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)