patch 'net/igc: fix Rx and Tx queue status' has been queued to stable release 22.11.3

[Xueming Li]

Hi,

FYI, your patch has been queued to stable release 22.11.3

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 08/11/23. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://git.dpdk.org/dpdk-stable/log/?h=22.11-staging

This queued commit can be viewed at:
https://git.dpdk.org/dpdk-stable/commit/?h=22.11-staging&id=c4b93c61288a69bcd84625d348e446359549641c

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From c4b93c61288a69bcd84625d348e446359549641c Mon Sep 17 00:00:00 2001
From: Qiming Yang <qiming.yang at intel.com>
Date: Wed, 12 Jul 2023 08:31:52 +0000
Subject: [PATCH] net/igc: fix Rx and Tx queue status
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit 921ff14280ed8ba7b9d0a898046cf5eadf3d4c8e ]

Igc driver don't enable queue start/stop functions, queue status is not
updated when the HW queue enabled or disabled. It caused application can't
get correct queue status.
This patch fixes the issue by updating the queue states when the queue is
disabled or enabled.

Fixes: a5aeb2b9e225 ("net/igc: support Rx and Tx")

Signed-off-by: Qiming Yang <qiming.yang at intel.com>
Signed-off-by: Mingjin Ye <mingjinx.ye at intel.com>
Acked-by: Qi Zhang <qi.z.zhang at intel.com>
---
 drivers/net/igc/igc_txrx.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/igc/igc_txrx.c b/drivers/net/igc/igc_txrx.c
index ffd219b0df..160865e911 100644
--- a/drivers/net/igc/igc_txrx.c
+++ b/drivers/net/igc/igc_txrx.c
@@ -1291,6 +1291,7 @@ igc_rx_init(struct rte_eth_dev *dev)
 			dvmolr |= IGC_DVMOLR_STRCRC;
 
 		IGC_WRITE_REG(hw, IGC_DVMOLR(rxq->reg_idx), dvmolr);
+		dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
 	}
 
 	return 0;
@@ -1934,6 +1935,7 @@ igc_dev_clear_queues(struct rte_eth_dev *dev)
 		if (txq != NULL) {
 			igc_tx_queue_release_mbufs(txq);
 			igc_reset_tx_queue(txq);
+			dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
 		}
 	}
 
@@ -1942,6 +1944,7 @@ igc_dev_clear_queues(struct rte_eth_dev *dev)
 		if (rxq != NULL) {
 			igc_rx_queue_release_mbufs(rxq);
 			igc_reset_rx_queue(rxq);
+			dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
 		}
 	}
 }
@@ -2187,6 +2190,7 @@ igc_tx_init(struct rte_eth_dev *dev)
 				IGC_TXDCTL_WTHRESH_MSK;
 		txdctl |= IGC_TXDCTL_QUEUE_ENABLE;
 		IGC_WRITE_REG(hw, IGC_TXDCTL(txq->reg_idx), txdctl);
+		dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
 	}
 
 	igc_config_collision_dist(hw);
-- 
2.25.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2023-08-09 21:51:20.978064900 +0800
+++ 0110-net-igc-fix-Rx-and-Tx-queue-status.patch	2023-08-09 21:51:18.274352000 +0800
@@ -1 +1 @@
-From 921ff14280ed8ba7b9d0a898046cf5eadf3d4c8e Mon Sep 17 00:00:00 2001
+From c4b93c61288a69bcd84625d348e446359549641c Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit 921ff14280ed8ba7b9d0a898046cf5eadf3d4c8e ]
@@ -13 +15,0 @@
-Cc: stable at dpdk.org
@@ -23 +25 @@
-index c11b6f7f25..5c60e3e997 100644
+index ffd219b0df..160865e911 100644
@@ -26 +28 @@
-@@ -1215,6 +1215,7 @@ igc_rx_init(struct rte_eth_dev *dev)
+@@ -1291,6 +1291,7 @@ igc_rx_init(struct rte_eth_dev *dev)
@@ -34 +36 @@
-@@ -1888,6 +1889,7 @@ igc_dev_clear_queues(struct rte_eth_dev *dev)
+@@ -1934,6 +1935,7 @@ igc_dev_clear_queues(struct rte_eth_dev *dev)
@@ -42 +44 @@
-@@ -1896,6 +1898,7 @@ igc_dev_clear_queues(struct rte_eth_dev *dev)
+@@ -1942,6 +1944,7 @@ igc_dev_clear_queues(struct rte_eth_dev *dev)
@@ -50 +52 @@
-@@ -2143,6 +2146,7 @@ igc_tx_init(struct rte_eth_dev *dev)
+@@ -2187,6 +2190,7 @@ igc_tx_init(struct rte_eth_dev *dev)
@@ -57 +59 @@
- 	if (offloads & RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP) {
+ 	igc_config_collision_dist(hw);