patch 'net/hns3: fix Rx multiple firmware reset interrupts' has been queued to stable release 21.11.5

[Kevin Traynor]

Hi,

FYI, your patch has been queued to stable release 21.11.5

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/25/23. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable

This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/b374bc7b0e8bb54f60d79d51d07f02d96882f666

Thanks.

Kevin

---
>From b374bc7b0e8bb54f60d79d51d07f02d96882f666 Mon Sep 17 00:00:00 2001
From: Chengwen Feng <fengchengwen at huawei.com>
Date: Mon, 22 May 2023 21:17:39 +0800
Subject: [PATCH] net/hns3: fix Rx multiple firmware reset interrupts

[ upstream commit e3c71325cec3353c4b9623310ece363a7c79604f ]

In the firmware (also known as IMP) reset scenario, driver interrupt
processing and firmware watchdog initialization are asynchronous.

If the driver interrupt processing is faster than firmware watchdog
initialization (that is, the driver clears the firmware reset
interrupt source before the firmware watchdog is initialized), the
driver will receive multiple firmware reset interrupts.

In the Kunpeng 920 platform, the above situation does not exist. But
it does on the newer platforms. So we add 5ms delay before drivers
clears the IMP reset interrupt source.

As for the impact of 5ms, the number of PFs managed by a firmware is
limited. Therefore, even if a DPDK process takes over all the PFs
which managed by the firmware, the delay is controllable.

Fixes: ee930d38ffca ("net/hns3: fix timing of clearing interrupt source")

Signed-off-by: Chengwen Feng <fengchengwen at huawei.com>
Signed-off-by: Dongdong Liu <liudongdong3 at huawei.com>
---
 drivers/net/hns3/hns3_ethdev.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 6382384301..3f04586a34 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -287,4 +287,17 @@ hns3_handle_mac_tnl(struct hns3_hw *hw)
 }
 
+static void
+hns3_delay_before_clear_event_cause(struct hns3_hw *hw, uint32_t event_type, uint32_t regclr)
+{
+#define IMPRESET_WAIT_MS_TIME	5
+
+	if (event_type == HNS3_VECTOR0_EVENT_RST &&
+	    regclr & BIT(HNS3_VECTOR0_IMPRESET_INT_B) &&
+	    hw->revision >= PCI_REVISION_ID_HIP09_A) {
+		rte_delay_ms(IMPRESET_WAIT_MS_TIME);
+		hns3_dbg(hw, "wait firmware watchdog initialization completed.");
+	}
+}
+
 static void
 hns3_interrupt_handler(void *param)
@@ -306,4 +319,5 @@ hns3_interrupt_handler(void *param)
 	ras_int = hns3_read_dev(hw, HNS3_RAS_PF_OTHER_INT_STS_REG);
 	cmdq_int = hns3_read_dev(hw, HNS3_VECTOR0_CMDQ_SRC_REG);
+	hns3_delay_before_clear_event_cause(hw, event_cause, clearval);
 	hns3_clear_event_cause(hw, event_cause, clearval);
 	/* vector 0 interrupt is shared with reset and mailbox source events. */
-- 
2.41.0

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2023-07-20 16:17:59.035956100 +0100
+++ 0033-net-hns3-fix-Rx-multiple-firmware-reset-interrupts.patch	2023-07-20 16:17:54.581750181 +0100
@@ -1 +1 @@
-From e3c71325cec3353c4b9623310ece363a7c79604f Mon Sep 17 00:00:00 2001
+From b374bc7b0e8bb54f60d79d51d07f02d96882f666 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit e3c71325cec3353c4b9623310ece363a7c79604f ]
+
@@ -23 +24,0 @@
-Cc: stable at dpdk.org
@@ -32 +33 @@
-index 5ef66f96c6..664226a6ef 100644
+index 6382384301..3f04586a34 100644