patch 'net/mlx5: fix matcher layout size calculation' has been queued to stable release 22.11.3

[Xueming Li]

Hi,

FYI, your patch has been queued to stable release 22.11.3

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 06/27/23. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://git.dpdk.org/dpdk-stable/log/?h=22.11-staging

This queued commit can be viewed at:
https://git.dpdk.org/dpdk-stable/commit/?h=22.11-staging&id=2e6f71cb519bae6da63cbb0d48070b4ab14e26a2

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From 2e6f71cb519bae6da63cbb0d48070b4ab14e26a2 Mon Sep 17 00:00:00 2001
From: Rongwei Liu <rongweil at nvidia.com>
Date: Tue, 16 May 2023 08:40:52 +0300
Subject: [PATCH] net/mlx5: fix matcher layout size calculation
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit ebc352c77fd1bc6c2fbfa668bb92fa4b06e63146 ]

Initially, the rdma-core library only supported misc0 to misc3 fields in
matching resources, misc4 and misc5 fields were added to handle new
features. The matcher layout, passing from DPDK to rdma-core, shouldn't
exceed the size of the engaged library version capabilities.

For now, there is no way to know what is the maximum capability of
rdma-core, and DPDK should limit the matcher layout to misc3 if
possible (no matching on fields misc4 and misc5 are requested by the
application).

The check if misc4 and misc5 features were requested was based on checking
the values against zeroes. The matching mask should be checked instead.

Fixes: 630a587bfb37 ("net/mlx5: support matching on VXLAN reserved field")

Signed-off-by: Rongwei Liu <rongweil at nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo at nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 7ca909999b..12db56f173 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -14825,7 +14825,7 @@ flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
 			}
 			dv->actions[n++] = priv->sh->default_miss_action;
 		}
-		misc_mask = flow_dv_matcher_enable(dv->value.buf);
+		misc_mask = flow_dv_matcher_enable(dv_h->matcher->mask.buf);
 		__flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
 		err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
 					       (void *)&dv->value, n,
@@ -17025,7 +17025,7 @@ flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
 static int
 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
 			uint32_t color_reg_c_idx,
-			enum rte_color color, void *matcher_object,
+			enum rte_color color, struct mlx5_flow_dv_matcher *matcher,
 			int actions_n, void *actions,
 			bool match_src_port, const struct rte_flow_item *item,
 			void **rule, const struct rte_flow_attr *attr)
@@ -17055,9 +17055,9 @@ __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
 	}
 	flow_dv_match_meta_reg(value.buf, (enum modify_reg)color_reg_c_idx,
 			       rte_col_2_mlx5_col(color), UINT32_MAX);
-	misc_mask = flow_dv_matcher_enable(value.buf);
+	misc_mask = flow_dv_matcher_enable(matcher->mask.buf);
 	__flow_dv_adjust_buf_size(&value.size, misc_mask);
-	ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
+	ret = mlx5_flow_os_create_flow(matcher->matcher_object, (void *)&value,
 				       actions_n, actions, rule);
 	if (ret) {
 		DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
@@ -17211,7 +17211,7 @@ __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
 		/* Create flow, matching color. */
 		if (__flow_dv_create_policy_flow(dev,
 				color_reg_c_idx, (enum rte_color)i,
-				color_rule->matcher->matcher_object,
+				color_rule->matcher,
 				acts[i].actions_n, acts[i].dv_actions,
 				svport_match, NULL, &color_rule->rule,
 				&attr)) {
@@ -17679,7 +17679,7 @@ flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
 			actions[i++] = priv->sh->dr_drop_action;
 			flow_dv_match_meta_reg_all(matcher_para.buf, value.buf,
 				(enum modify_reg)mtr_id_reg_c, 0, 0);
-			misc_mask = flow_dv_matcher_enable(value.buf);
+			misc_mask = flow_dv_matcher_enable(mtrmng->def_matcher[domain]->mask.buf);
 			__flow_dv_adjust_buf_size(&value.size, misc_mask);
 			ret = mlx5_flow_os_create_flow
 				(mtrmng->def_matcher[domain]->matcher_object,
@@ -17724,7 +17724,7 @@ flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
 					fm->drop_cnt, NULL);
 		actions[i++] = cnt->action;
 		actions[i++] = priv->sh->dr_drop_action;
-		misc_mask = flow_dv_matcher_enable(value.buf);
+		misc_mask = flow_dv_matcher_enable(drop_matcher->mask.buf);
 		__flow_dv_adjust_buf_size(&value.size, misc_mask);
 		ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
 					       (void *)&value, i, actions,
@@ -18204,7 +18204,7 @@ flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
 				goto err_exit;
 			}
 			if (__flow_dv_create_policy_flow(dev, color_reg_c_idx, (enum rte_color)j,
-						color_rule->matcher->matcher_object,
+						color_rule->matcher,
 						acts.actions_n, acts.dv_actions,
 						true, item, &color_rule->rule, &attr)) {
 				rte_spinlock_unlock(&mtr_policy->sl);
@@ -19248,7 +19248,7 @@ flow_dv_discover_priorities(struct rte_eth_dev *dev,
 			break;
 		}
 		/* Try to apply the flow to HW. */
-		misc_mask = flow_dv_matcher_enable(flow.dv.value.buf);
+		misc_mask = flow_dv_matcher_enable(flow.handle->dvh.matcher->mask.buf);
 		__flow_dv_adjust_buf_size(&flow.dv.value.size, misc_mask);
 		err = mlx5_flow_os_create_flow
 				(flow.handle->dvh.matcher->matcher_object,
-- 
2.25.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2023-06-25 14:32:00.852383700 +0800
+++ 0088-net-mlx5-fix-matcher-layout-size-calculation.patch	2023-06-25 14:31:58.475773900 +0800
@@ -1 +1 @@
-From ebc352c77fd1bc6c2fbfa668bb92fa4b06e63146 Mon Sep 17 00:00:00 2001
+From 2e6f71cb519bae6da63cbb0d48070b4ab14e26a2 Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit ebc352c77fd1bc6c2fbfa668bb92fa4b06e63146 ]
@@ -20 +22,0 @@
-Cc: stable at dpdk.org
@@ -29 +31 @@
-index 70a5f4858c..e7a2ae933c 100644
+index 7ca909999b..12db56f173 100644
@@ -32 +34 @@
-@@ -15157,7 +15157,7 @@ flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
+@@ -14825,7 +14825,7 @@ flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
@@ -41 +43 @@
-@@ -17357,7 +17357,7 @@ flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
+@@ -17025,7 +17025,7 @@ flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
@@ -50 +52 @@
-@@ -17387,9 +17387,9 @@ __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
+@@ -17055,9 +17055,9 @@ __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
@@ -62 +64 @@
-@@ -17543,7 +17543,7 @@ __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
+@@ -17211,7 +17211,7 @@ __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
@@ -71 +73 @@
-@@ -18011,7 +18011,7 @@ flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
+@@ -17679,7 +17679,7 @@ flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
@@ -80 +82 @@
-@@ -18056,7 +18056,7 @@ flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
+@@ -17724,7 +17724,7 @@ flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
@@ -89 +91 @@
-@@ -18536,7 +18536,7 @@ flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
+@@ -18204,7 +18204,7 @@ flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
@@ -98 +100 @@
-@@ -19580,7 +19580,7 @@ flow_dv_discover_priorities(struct rte_eth_dev *dev,
+@@ -19248,7 +19248,7 @@ flow_dv_discover_priorities(struct rte_eth_dev *dev,