[PATCH v4] event/dlb2: fix disable PASID

Bruce Richardson bruce.richardson at intel.com
Fri Nov 3 18:18:37 CET 2023


On Fri, Nov 03, 2023 at 12:14:36PM -0500, Abdullah Sevincer wrote:
> In vfio-pci driver when PASID is enabled by default
> DLB hardware puts DLB in SIOV mode. This breaks
> DLB PF-PMD mode. For DLB PF-PMD mode to function properly
> PASID needs to be disabled.
> 
> In this commit this issue is addressed and PASID is disabled
> by writing a zero to PASID control register.
> 
> Fixes: 5433956d5185 ("event/dlb2: add eventdev probe")
> Cc: stable at dpdk.org
> 
> Signed-off-by: Abdullah Sevincer <abdullah.sevincer at intel.com>

You are probably better to send this as part of a patchset with the patch
to add the disable to bus_pci, since the two patches are linked. Also, if
you want this to be backported - since you CC stable - you also need the
pre-requisite patch to be backported too. Therefore, CC both to
stable at dpdk.org.

/Bruce

> ---
>  drivers/event/dlb2/pf/dlb2_main.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/event/dlb2/pf/dlb2_main.c b/drivers/event/dlb2/pf/dlb2_main.c
> index aa03e4c311..63a18df71c 100644
> --- a/drivers/event/dlb2/pf/dlb2_main.c
> +++ b/drivers/event/dlb2/pf/dlb2_main.c
> @@ -514,6 +514,16 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
>  		}
>  	}
>  
> +	/* Disable PASID incase it is enabled by default, which
> +	 * breaks the DLB if enabled.
> +	 */
> +	off = RTE_PCI_PASID_CAP_OFFSET + RTE_PCI_PASID_CTRL;
> +	if (rte_pci_set_pasid(pdev, off, false)) {
> +		DLB2_LOG_ERR("[%s()] failed to write the pcie config space at offset %d\n",
> +				__func__, (int)off);
> +		return -1;
> +	}
> +
>  	return 0;
>  }
>  
> -- 
> 2.25.1
> 


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