[PATCH v2] crypto/qat: fix gen3 legacy capabilities

[Ciara Power]

When the legacy capability flag was enabled for QAT GEN3,
in the case of the last legacy capability in the list being SM3 or SM4,
when no slice is on the device, the loop continues instead of checking
if the end of the legacy capbilities list has been met.

To fix this, the check for the end of the legacy capabilities list is
moved to the top of the loop, so it is detected when the last legacy
element is SM and no SM slice exists.

Fixes: cffb726b7797 ("crypto/qat: enable insecure algorithms")
Cc: stable at dpdk.org

Signed-off-by: Ciara Power <ciara.power at intel.com>

---
v2: updating sender email
---
 drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
index 0a939161f9..150f77ab0c 100644
--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
@@ -232,6 +232,13 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_private *internals,
 	}
 
 	for (i = 0; i < capa_num; i++, iter++) {
+		if (unlikely(qat_legacy_capa) && (i == legacy_capa_num)) {
+			capabilities = qat_sym_crypto_caps_gen3;
+			addr += curr_capa;
+			curr_capa = 0;
+			iter = 0;
+		}
+
 		if (slice_map & ICP_ACCEL_MASK_SM4_SLICE && (
 			check_cipher_capa(&capabilities[iter],
 				RTE_CRYPTO_CIPHER_SM4_ECB) ||
@@ -249,13 +256,6 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_private *internals,
 		memcpy(addr + curr_capa, capabilities + iter,
 			sizeof(struct rte_cryptodev_capabilities));
 		curr_capa++;
-
-		if (unlikely(qat_legacy_capa) && (i == legacy_capa_num-1)) {
-			capabilities = qat_sym_crypto_caps_gen3;
-			addr += curr_capa;
-			curr_capa = 0;
-			iter = -1;
-		}
 	}
 	internals->qat_dev_capabilities = internals->capa_mz->addr;
 
-- 
2.25.1