patch 'event/cnxk: fix context flush in port cleanup' has been queued to stable release 22.11.4

[Xueming Li]

Hi,

FYI, your patch has been queued to stable release 22.11.4

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 11/15/23. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://git.dpdk.org/dpdk-stable/log/?h=22.11-staging

This queued commit can be viewed at:
https://git.dpdk.org/dpdk-stable/commit/?h=22.11-staging&id=6d49fdbd99d28b4d5426d9e30ad0d0bbd4845afa

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From 6d49fdbd99d28b4d5426d9e30ad0d0bbd4845afa Mon Sep 17 00:00:00 2001
From: Pavan Nikhilesh <pbhagavatula at marvell.com>
Date: Sat, 9 Sep 2023 22:27:46 +0530
Subject: [PATCH] event/cnxk: fix context flush in port cleanup
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit 5808b30ab74f04b687f4487718849f935bcab607 ]

Flush currently held flow context during event port cleanup.

Fixes: e8594de2731d ("event/cnxk: implement event port quiesce function")

Signed-off-by: Pavan Nikhilesh <pbhagavatula at marvell.com>
---
 drivers/event/cnxk/cn10k_eventdev.c | 18 ++++++++++++++----
 drivers/event/cnxk/cn9k_eventdev.c  | 25 +++++++++++++++++++------
 2 files changed, 33 insertions(+), 10 deletions(-)

diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c
index 77014ada00..d8e7c83462 100644
--- a/drivers/event/cnxk/cn10k_eventdev.c
+++ b/drivers/event/cnxk/cn10k_eventdev.c
@@ -197,12 +197,14 @@ cn10k_sso_hws_reset(void *arg, void *hws)
 			cnxk_sso_hws_swtag_untag(base +
 						 SSOW_LF_GWS_OP_SWTAG_UNTAG);
 		plt_write64(0, base + SSOW_LF_GWS_OP_DESCHED);
+	} else if (pend_tt != SSO_TT_EMPTY) {
+		plt_write64(0, base + SSOW_LF_GWS_OP_SWTAG_FLUSH);
 	}

 	/* Wait for desched to complete. */
 	do {
 		pend_state = plt_read64(base + SSOW_LF_GWS_PENDSTATE);
-	} while (pend_state & BIT_ULL(58));
+	} while (pend_state & (BIT_ULL(58) | BIT_ULL(56)));

 	switch (dev->gw_mode) {
 	case CN10K_GW_MODE_PREF:
@@ -711,11 +713,16 @@ cn10k_sso_port_quiesce(struct rte_eventdev *event_dev, void *port,
 	cn10k_sso_hws_get_work_empty(ws, &ev,
 				     (NIX_RX_OFFLOAD_MAX - 1) | NIX_RX_REAS_F |
 					     NIX_RX_MULTI_SEG_F | CPT_RX_WQE_F);
-	if (is_pend && ev.u64) {
+	if (is_pend && ev.u64)
 		if (flush_cb)
 			flush_cb(event_dev->data->dev_id, ev, args);
+	ptag = (plt_read64(ws->base + SSOW_LF_GWS_TAG) >> 32) & SSO_TT_EMPTY;
+	if (ptag != SSO_TT_EMPTY)
 		cnxk_sso_hws_swtag_flush(ws->base);
-	}
+
+	do {
+		ptag = plt_read64(ws->base + SSOW_LF_GWS_PENDSTATE);
+	} while (ptag & BIT_ULL(56));

 	/* Check if we have work in PRF_WQE0, if so extract it. */
 	switch (dev->gw_mode) {
@@ -741,8 +748,11 @@ cn10k_sso_port_quiesce(struct rte_eventdev *event_dev, void *port,
 		if (ev.u64) {
 			if (flush_cb)
 				flush_cb(event_dev->data->dev_id, ev, args);
-			cnxk_sso_hws_swtag_flush(ws->base);
 		}
+		cnxk_sso_hws_swtag_flush(ws->base);
+		do {
+			ptag = plt_read64(ws->base + SSOW_LF_GWS_PENDSTATE);
+		} while (ptag & BIT_ULL(56));
 	}
 	ws->swtag_req = 0;
 	plt_write64(0, ws->base + SSOW_LF_GWS_OP_GWC_INVAL);
diff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c
index 4f362a8e80..803e7ddd07 100644
--- a/drivers/event/cnxk/cn9k_eventdev.c
+++ b/drivers/event/cnxk/cn9k_eventdev.c
@@ -223,16 +223,16 @@ cn9k_sso_hws_reset(void *arg, void *hws)
 				cnxk_sso_hws_swtag_untag(
 					base + SSOW_LF_GWS_OP_SWTAG_UNTAG);
 			plt_write64(0, base + SSOW_LF_GWS_OP_DESCHED);
+		} else if (pend_tt != SSO_TT_EMPTY) {
+			plt_write64(0, base + SSOW_LF_GWS_OP_SWTAG_FLUSH);
 		}

 		/* Wait for desched to complete. */
 		do {
 			pend_state = plt_read64(base + SSOW_LF_GWS_PENDSTATE);
-		} while (pend_state & BIT_ULL(58));
-
+		} while (pend_state & (BIT_ULL(58) | BIT_ULL(56)));
 		plt_write64(0, base + SSOW_LF_GWS_OP_GWC_INVAL);
 	}
-
 	if (dev->dual_ws)
 		dws->swtag_req = 0;
 	else
@@ -846,12 +846,25 @@ cn9k_sso_port_quiesce(struct rte_eventdev *event_dev, void *port,
 			base, &ev, dev->rx_offloads,
 			dev->dual_ws ? dws->lookup_mem : ws->lookup_mem,
 			dev->dual_ws ? dws->tstamp : ws->tstamp);
-		if (is_pend && ev.u64) {
+		if (is_pend && ev.u64)
 			if (flush_cb)
 				flush_cb(event_dev->data->dev_id, ev, args);
-			cnxk_sso_hws_swtag_flush(ws->base);
-		}
+
+		ptag = (plt_read64(base + SSOW_LF_GWS_TAG) >> 32) & SSO_TT_EMPTY;
+		if (ptag != SSO_TT_EMPTY)
+			cnxk_sso_hws_swtag_flush(base);
+
+		do {
+			ptag = plt_read64(base + SSOW_LF_GWS_PENDSTATE);
+		} while (ptag & BIT_ULL(56));
+
+		plt_write64(0, base + SSOW_LF_GWS_OP_GWC_INVAL);
 	}
+
+	if (dev->dual_ws)
+		dws->swtag_req = 0;
+	else
+		ws->swtag_req = 0;
 }

 static int
--
2.25.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2023-10-22 22:17:36.604021000 +0800
+++ 0060-event-cnxk-fix-context-flush-in-port-cleanup.patch	2023-10-22 22:17:34.276723700 +0800
@@ -1 +1 @@
-From 5808b30ab74f04b687f4487718849f935bcab607 Mon Sep 17 00:00:00 2001
+From 6d49fdbd99d28b4d5426d9e30ad0d0bbd4845afa Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit 5808b30ab74f04b687f4487718849f935bcab607 ]
@@ -9 +11,0 @@
-Cc: stable at dpdk.org
@@ -18 +20 @@
-index cae2efbb69..cf186b9af4 100644
+index 77014ada00..d8e7c83462 100644
@@ -21 +23 @@
-@@ -204,12 +204,14 @@ cn10k_sso_hws_reset(void *arg, void *hws)
+@@ -197,12 +197,14 @@ cn10k_sso_hws_reset(void *arg, void *hws)
@@ -37,2 +39 @@
-@@ -587,11 +589,16 @@ cn10k_sso_port_quiesce(struct rte_eventdev *event_dev, void *port,
-
+@@ -711,11 +713,16 @@ cn10k_sso_port_quiesce(struct rte_eventdev *event_dev, void *port,
@@ -40 +41,2 @@
- 				     (NIX_RX_OFFLOAD_MAX - 1) | NIX_RX_REAS_F | NIX_RX_MULTI_SEG_F);
+ 				     (NIX_RX_OFFLOAD_MAX - 1) | NIX_RX_REAS_F |
+ 					     NIX_RX_MULTI_SEG_F | CPT_RX_WQE_F);
@@ -56 +58 @@
-@@ -615,8 +622,11 @@ cn10k_sso_port_quiesce(struct rte_eventdev *event_dev, void *port,
+@@ -741,8 +748,11 @@ cn10k_sso_port_quiesce(struct rte_eventdev *event_dev, void *port,
@@ -70 +72 @@
-index f77a9d7085..fe6f5d9f86 100644
+index 4f362a8e80..803e7ddd07 100644
@@ -73 +75 @@
-@@ -222,16 +222,16 @@ cn9k_sso_hws_reset(void *arg, void *hws)
+@@ -223,16 +223,16 @@ cn9k_sso_hws_reset(void *arg, void *hws)
@@ -93 +95 @@
-@@ -686,12 +686,25 @@ cn9k_sso_port_quiesce(struct rte_eventdev *event_dev, void *port,
+@@ -846,12 +846,25 @@ cn9k_sso_port_quiesce(struct rte_eventdev *event_dev, void *port,