patch 'net/axgbe: identify CPU with cpuid' has been queued to stable release 22.11.4

Xueming Li xuemingl at nvidia.com
Sun Oct 22 16:22:05 CEST 2023


Hi,

FYI, your patch has been queued to stable release 22.11.4

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 11/15/23. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://git.dpdk.org/dpdk-stable/log/?h=22.11-staging

This queued commit can be viewed at:
https://git.dpdk.org/dpdk-stable/commit/?h=22.11-staging&id=b796460bce754d25377a4e8b3a52c0d0ad7d47c4

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From b796460bce754d25377a4e8b3a52c0d0ad7d47c4 Mon Sep 17 00:00:00 2001
From: Selwin Sebastian <selwin.sebastian at amd.com>
Date: Wed, 4 Oct 2023 15:37:54 +0530
Subject: [PATCH] net/axgbe: identify CPU with cpuid
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit a27ff9cac18cdc5800d8b1c181ddf2a8c92aaac2 ]

Using root complex to identify CPU will not work for VM passthrough.
cpuid is used to get family and model id to identify CPU.

Fixes: b0db927b5eba ("net/axgbe: use PCI root complex device to distinguish device")

Signed-off-by: Selwin Sebastian <selwin.sebastian at amd.com>
Acked-by: Ferruh Yigit <ferruh.yigit at amd.com>
---
 drivers/net/axgbe/axgbe_ethdev.c | 106 ++++++++++++++++++-------------
 1 file changed, 63 insertions(+), 43 deletions(-)

diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index b071e4e460..da48a3ac42 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -12,6 +12,12 @@

 #include "eal_filesystem.h"

+#ifdef RTE_ARCH_X86
+#include <cpuid.h>
+#else
+#define __cpuid(n, a, b, c, d)
+#endif
+
 static int eth_axgbe_dev_init(struct rte_eth_dev *eth_dev);
 static int  axgbe_dev_configure(struct rte_eth_dev *dev);
 static int  axgbe_dev_start(struct rte_eth_dev *dev);
@@ -172,9 +178,14 @@ static const struct axgbe_xstats axgbe_xstats_strings[] = {

 /* The set of PCI devices this driver supports */
 #define AMD_PCI_VENDOR_ID       0x1022
-#define AMD_PCI_RV_ROOT_COMPLEX_ID	0x15d0
-#define AMD_PCI_YC_ROOT_COMPLEX_ID	0x14b5
-#define AMD_PCI_SNOWY_ROOT_COMPLEX_ID	0x1450
+
+#define	Fam17h	0x17
+#define	Fam19h	0x19
+
+#define	CPUID_VENDOR_AuthenticAMD_ebx	0x68747541
+#define	CPUID_VENDOR_AuthenticAMD_ecx	0x444d4163
+#define	CPUID_VENDOR_AuthenticAMD_edx	0x69746e65
+
 #define AMD_PCI_AXGBE_DEVICE_V2A 0x1458
 #define AMD_PCI_AXGBE_DEVICE_V2B 0x1459

@@ -2122,29 +2133,6 @@ static void axgbe_default_config(struct axgbe_port *pdata)
 	pdata->power_down = 0;
 }

-/*
- * Return PCI root complex device id on success else 0
- */
-static uint16_t
-get_pci_rc_devid(void)
-{
-	char pci_sysfs[PATH_MAX];
-	const struct rte_pci_addr pci_rc_addr = {0, 0, 0, 0};
-	unsigned long device_id;
-
-	snprintf(pci_sysfs, sizeof(pci_sysfs), "%s/" PCI_PRI_FMT "/device",
-		 rte_pci_get_sysfs_path(), pci_rc_addr.domain,
-		 pci_rc_addr.bus, pci_rc_addr.devid, pci_rc_addr.function);
-
-	/* get device id */
-	if (eal_parse_sysfs_value(pci_sysfs, &device_id) < 0) {
-		PMD_INIT_LOG(ERR, "Error in reading PCI sysfs\n");
-		return 0;
-	}
-
-	return (uint16_t)device_id;
-}
-
 /*
  * It returns 0 on success.
  */
@@ -2158,6 +2146,9 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
 	uint32_t len;
 	int ret;

+	unsigned int eax = 0, ebx = 0, ecx = 0, edx = 0;
+	unsigned char cpu_family = 0, cpu_model = 0;
+
 	eth_dev->dev_ops = &axgbe_eth_dev_ops;

 	eth_dev->rx_descriptor_status = axgbe_dev_rx_descriptor_status;
@@ -2196,26 +2187,55 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
 		pdata->vdata = &axgbe_v2b;

 	/*
-	 * Use PCI root complex device ID to identify the CPU
+	 * Use CPUID to get Family and model ID to identify the CPU
 	 */
-	switch (get_pci_rc_devid()) {
-	case AMD_PCI_RV_ROOT_COMPLEX_ID:
-		pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
-		pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
-		break;
-	case AMD_PCI_YC_ROOT_COMPLEX_ID:
-		pdata->xpcs_window_def_reg = PCS_V2_YC_WINDOW_DEF;
-		pdata->xpcs_window_sel_reg = PCS_V2_YC_WINDOW_SELECT;
-		/* Yellow Carp devices do not need cdr workaround */
-		pdata->vdata->an_cdr_workaround = 0;
+	__cpuid(0x0, eax, ebx, ecx, edx);
+
+	if (ebx == CPUID_VENDOR_AuthenticAMD_ebx &&
+		edx == CPUID_VENDOR_AuthenticAMD_edx &&
+		ecx == CPUID_VENDOR_AuthenticAMD_ecx) {
+		int unknown_cpu = 0;
+		eax = 0, ebx = 0, ecx = 0, edx = 0;
+
+		__cpuid(0x1, eax, ebx, ecx, edx);
+
+		cpu_family = ((GET_BITS(eax, 8, 4)) + (GET_BITS(eax, 20, 8)));
+		cpu_model = ((GET_BITS(eax, 4, 4)) | (((GET_BITS(eax, 16, 4)) << 4) & 0xF0));
+
+		switch (cpu_family) {
+		case Fam17h:
+		/* V1000/R1000 */
+		if (cpu_model >= 0x10 && cpu_model <= 0x1F) {
+			pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
+			pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
+		/* EPYC 3000 */
+		} else if (cpu_model >= 0x01 && cpu_model <= 0x0F) {
+			pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
+			pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+		} else {
+			unknown_cpu = 1;
+		}
 		break;
-	case AMD_PCI_SNOWY_ROOT_COMPLEX_ID:
-		pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
-		pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+		case Fam19h:
+		/* V3000 (Yellow Carp) */
+		if (cpu_model >= 0x44 && cpu_model <= 0x47) {
+			pdata->xpcs_window_def_reg = PCS_V2_YC_WINDOW_DEF;
+			pdata->xpcs_window_sel_reg = PCS_V2_YC_WINDOW_SELECT;
+
+			/* Yellow Carp devices do not need cdr workaround */
+			pdata->vdata->an_cdr_workaround = 0;
+		} else {
+			unknown_cpu = 1;
+		}
 		break;
-	default:
-		PMD_DRV_LOG(ERR, "No supported devices found\n");
-		return -ENODEV;
+		default:
+			unknown_cpu = 1;
+			break;
+		}
+		if (unknown_cpu) {
+			PMD_DRV_LOG(ERR, "Unknown CPU family, no supported axgbe device found\n");
+			return -ENODEV;
+		}
 	}

 	/* Configure the PCS indirect addressing support */
--
2.25.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2023-10-22 22:17:37.900686300 +0800
+++ 0096-net-axgbe-identify-CPU-with-cpuid.patch	2023-10-22 22:17:34.366723700 +0800
@@ -1 +1 @@
-From a27ff9cac18cdc5800d8b1c181ddf2a8c92aaac2 Mon Sep 17 00:00:00 2001
+From b796460bce754d25377a4e8b3a52c0d0ad7d47c4 Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit a27ff9cac18cdc5800d8b1c181ddf2a8c92aaac2 ]
@@ -10 +12,0 @@
-Cc: stable at dpdk.org
@@ -19 +21 @@
-index 48714eebe6..d08ea4893c 100644
+index b071e4e460..da48a3ac42 100644
@@ -53 +55 @@
-@@ -2111,29 +2122,6 @@ static void axgbe_default_config(struct axgbe_port *pdata)
+@@ -2122,29 +2133,6 @@ static void axgbe_default_config(struct axgbe_port *pdata)
@@ -80,2 +82,2 @@
- /* Used in dev_start by primary process and then
-  * in dev_init by secondary process when attaching to an existing ethdev.
+ /*
+  * It returns 0 on success.
@@ -83 +85 @@
-@@ -2186,6 +2174,9 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
+@@ -2158,6 +2146,9 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
@@ -93 +95 @@
-@@ -2230,26 +2221,55 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
+@@ -2196,26 +2187,55 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)


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