patch 'net/thunderx: fix DMAC control register update' has been queued to stable release 23.11.1

[Xueming Li]

Hi,

FYI, your patch has been queued to stable release 23.11.1

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 03/31/24. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging

This queued commit can be viewed at:
https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=0e5798d30b0a7c87e4c43a554d798d7799cf6824

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From 0e5798d30b0a7c87e4c43a554d798d7799cf6824 Mon Sep 17 00:00:00 2001
From: Hanumanth Pothula <hpothula at marvell.com>
Date: Thu, 21 Dec 2023 16:49:59 +0530
Subject: [PATCH] net/thunderx: fix DMAC control register update
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit 44a8635459cbc83cde94b64971faee34ca9be19d ]

By default dmac control register is set to reject packets
on mac address match, leading all unicast packets to drop.
Update DMAC control register to allow packets on MAC address
match rather than dropping.

Fixes: e438796617dc ("net/thunderx: add PMD skeleton")

Signed-off-by: Hanumanth Pothula <hpothula at marvell.com>
---
 drivers/net/thunderx/base/nicvf_mbox.c | 12 ++++++++++++
 drivers/net/thunderx/base/nicvf_mbox.h | 10 ++++++++++
 drivers/net/thunderx/nicvf_ethdev.c    | 26 ++++++++++++++++++++++++++
 3 files changed, 48 insertions(+)

diff --git a/drivers/net/thunderx/base/nicvf_mbox.c b/drivers/net/thunderx/base/nicvf_mbox.c
index 5993eec4e6..0e0176974d 100644
--- a/drivers/net/thunderx/base/nicvf_mbox.c
+++ b/drivers/net/thunderx/base/nicvf_mbox.c
@@ -485,3 +485,15 @@ nicvf_mbox_reset_xcast(struct nicvf *nic)
 	mbx.msg.msg = NIC_MBOX_MSG_RESET_XCAST;
 	nicvf_mbox_send_msg_to_pf(nic, &mbx);
 }
+
+int
+nicvf_mbox_set_xcast(struct nicvf *nic, uint8_t  mode, uint64_t mac)
+{
+	struct nic_mbx mbx = { .msg = { 0 } };
+
+	mbx.xcast.msg = NIC_MBOX_MSG_SET_XCAST;
+	mbx.xcast.mode = mode;
+	mbx.xcast.mac = mac;
+
+	return nicvf_mbox_send_msg_to_pf(nic, &mbx);
+}
diff --git a/drivers/net/thunderx/base/nicvf_mbox.h b/drivers/net/thunderx/base/nicvf_mbox.h
index 322c8159cb..47f3d13755 100644
--- a/drivers/net/thunderx/base/nicvf_mbox.h
+++ b/drivers/net/thunderx/base/nicvf_mbox.h
@@ -45,6 +45,8 @@
 #define	NIC_MBOX_MSG_CFG_DONE		0xF0	/* VF configuration done */
 #define	NIC_MBOX_MSG_SHUTDOWN		0xF1	/* VF is being shutdown */
 #define NIC_MBOX_MSG_RESET_XCAST	0xF2    /* Reset DCAM filtering mode */
+#define	NIC_MBOX_MSG_ADD_MCAST		0xF3	/* ADD MAC to DCAM filters */
+#define	NIC_MBOX_MSG_SET_XCAST		0xF4	/* Set MCAST/BCAST Rx mode */
 #define	NIC_MBOX_MSG_MAX		0x100	/* Maximum number of messages */

 /* Get vNIC VF configuration */
@@ -190,6 +192,12 @@ struct change_link_mode_msg {

 };

+struct xcast {
+	uint8_t    msg;
+	uint8_t    mode;
+	uint64_t   mac:48;
+};
+
 struct nic_mbx {
 /* 128 bit shared memory between PF and each VF */
 union {
@@ -209,6 +217,7 @@ union {
 	struct reset_stat_cfg	reset_stat;
 	struct set_link_state	set_link;
 	struct change_link_mode_msg mode;
+	struct xcast xcast;
 };
 };

@@ -239,5 +248,6 @@ void nicvf_mbox_cfg_done(struct nicvf *nic);
 void nicvf_mbox_link_change(struct nicvf *nic);
 void nicvf_mbox_reset_xcast(struct nicvf *nic);
 int nicvf_mbox_change_mode(struct nicvf *nic, struct change_link_mode *cfg);
+int nicvf_mbox_set_xcast(struct nicvf *nic, uint8_t  mode, uint64_t mac);

 #endif /* __THUNDERX_NICVF_MBOX__ */
diff --git a/drivers/net/thunderx/nicvf_ethdev.c b/drivers/net/thunderx/nicvf_ethdev.c
index 5a0c3dc4a6..ba2ef4058e 100644
--- a/drivers/net/thunderx/nicvf_ethdev.c
+++ b/drivers/net/thunderx/nicvf_ethdev.c
@@ -58,6 +58,10 @@ RTE_LOG_REGISTER_SUFFIX(nicvf_logtype_driver, driver, NOTICE);
 #define NICVF_QLM_MODE_SGMII  7
 #define NICVF_QLM_MODE_XFI   12

+#define BCAST_ACCEPT      0x01
+#define CAM_ACCEPT        (1 << 3)
+#define BGX_MCAST_MODE(x) ((x) << 1)
+
 enum nicvf_link_speed {
 	NICVF_LINK_SPEED_SGMII,
 	NICVF_LINK_SPEED_XAUI,
@@ -2185,9 +2189,22 @@ nicvf_eth_dev_uninit(struct rte_eth_dev *dev)
 	nicvf_dev_close(dev);
 	return 0;
 }
+
+static inline uint64_t ether_addr_to_u64(uint8_t *addr)
+{
+	uint64_t u = 0;
+	int i;
+
+	for (i = 0; i < RTE_ETHER_ADDR_LEN; i++)
+		u = u << 8 | addr[i];
+
+	return u;
+}
+
 static int
 nicvf_eth_dev_init(struct rte_eth_dev *eth_dev)
 {
+	uint8_t dmac_ctrl_reg = 0;
 	int ret;
 	struct rte_pci_device *pci_dev;
 	struct nicvf *nic = nicvf_pmd_priv(eth_dev);
@@ -2311,6 +2328,15 @@ nicvf_eth_dev_init(struct rte_eth_dev *eth_dev)
 		goto malloc_fail;
 	}

+	/* set DMAC CTRL reg to allow MAC */
+	dmac_ctrl_reg = BCAST_ACCEPT | BGX_MCAST_MODE(2) | CAM_ACCEPT;
+	ret = nicvf_mbox_set_xcast(nic, dmac_ctrl_reg,
+			ether_addr_to_u64(nic->mac_addr));
+	if (ret) {
+		PMD_INIT_LOG(ERR, "Failed to set mac addr");
+		goto malloc_fail;
+	}
+
 	ret = nicvf_set_first_skip(eth_dev);
 	if (ret) {
 		PMD_INIT_LOG(ERR, "Failed to configure first skip");
--
2.34.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2024-03-05 17:39:34.599785720 +0800
+++ 0121-net-thunderx-fix-DMAC-control-register-update.patch	2024-03-05 17:39:30.963566499 +0800
@@ -1 +1 @@
-From 44a8635459cbc83cde94b64971faee34ca9be19d Mon Sep 17 00:00:00 2001
+From 0e5798d30b0a7c87e4c43a554d798d7799cf6824 Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit 44a8635459cbc83cde94b64971faee34ca9be19d ]
@@ -12 +14,0 @@
-Cc: stable at dpdk.org
@@ -83 +85 @@
-index ddcc52770e..609d95dcfa 100644
+index 5a0c3dc4a6..ba2ef4058e 100644
@@ -97 +99 @@
-@@ -2182,9 +2186,22 @@ nicvf_eth_dev_uninit(struct rte_eth_dev *dev)
+@@ -2185,9 +2189,22 @@ nicvf_eth_dev_uninit(struct rte_eth_dev *dev)
@@ -120 +122 @@
-@@ -2308,6 +2325,15 @@ nicvf_eth_dev_init(struct rte_eth_dev *eth_dev)
+@@ -2311,6 +2328,15 @@ nicvf_eth_dev_init(struct rte_eth_dev *eth_dev)