patch 'doc: fix typo in packet framework guide' has been queued to stable release 22.11.5

[luca.boccassi at gmail.com]

Hi,

FYI, your patch has been queued to stable release 22.11.5

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 03/27/24. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/bluca/dpdk-stable

This queued commit can be viewed at:
https://github.com/bluca/dpdk-stable/commit/eebb999b4599b4f91a4063085ceac74fa1f8d18a

Thanks.

Luca Boccassi

---
>From eebb999b4599b4f91a4063085ceac74fa1f8d18a Mon Sep 17 00:00:00 2001
From: Flore Norceide <florestecien at gmail.com>
Date: Thu, 21 Mar 2024 19:03:52 -0400
Subject: [PATCH] doc: fix typo in packet framework guide

[ upstream commit e4e1f2f7d24240d476cfa757e218d1532759b65d ]

Caught by codespell

Fixes: fc1f2750a3ec ("doc: programmers guide")

Signed-off-by: Flore Norceide <florestecien at gmail.com>
---
 .mailmap                                   | 1 +
 doc/guides/prog_guide/packet_framework.rst | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/.mailmap b/.mailmap
index 0008a56d7f..cf3646b563 100644
--- a/.mailmap
+++ b/.mailmap
@@ -393,6 +393,7 @@ Fidaullah Noonari <fidaullah.noonari at emumba.com>
 Fiona Trahe <fiona.trahe at intel.com>
 Flavia Musatescu <flavia.musatescu at intel.com>
 Flavio Leitner <fbl at redhat.com> <fbl at sysclose.org>
+Flore Norceide <florestecien at gmail.com>
 Forrest Shi <xuelin.shi at nxp.com>
 Francesco Santoro <francesco.santoro at 6wind.com>
 Francis Kelly <fkelly at nvidia.com> <fkelly at mellanox.com>
diff --git a/doc/guides/prog_guide/packet_framework.rst b/doc/guides/prog_guide/packet_framework.rst
index 3d4e3b66cc..b263f23f17 100644
--- a/doc/guides/prog_guide/packet_framework.rst
+++ b/doc/guides/prog_guide/packet_framework.rst
@@ -512,7 +512,7 @@ the number of L2 or L3 cache memory misses is greatly reduced, hence one of the
 This is because the cost of L2/L3 cache memory miss on memory read accesses is high, as usually due to data dependency between instructions,
 the CPU execution units have to stall until the read operation is completed from L3 cache memory or external DRAM memory.
 By using prefetch instructions, the latency of memory read accesses is hidden,
-provided that it is preformed early enough before the respective data structure is actually used.
+provided that it is performed early enough before the respective data structure is actually used.
 
 By splitting the processing into several stages that are executed on different packets (the packets from the input burst are interlaced),
 enough work is created to allow the prefetch instructions to complete successfully (before the prefetched data structures are actually accessed) and
-- 
2.39.2

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2024-03-25 11:28:37.665248397 +0000
+++ 0006-doc-fix-typo-in-packet-framework-guide.patch	2024-03-25 11:28:37.200388907 +0000
@@ -1 +1 @@
-From e4e1f2f7d24240d476cfa757e218d1532759b65d Mon Sep 17 00:00:00 2001
+From eebb999b4599b4f91a4063085ceac74fa1f8d18a Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit e4e1f2f7d24240d476cfa757e218d1532759b65d ]
+
@@ -9 +10,0 @@
-Cc: stable at dpdk.org
@@ -18 +19 @@
-index 67687d21b1..ac50264e66 100644
+index 0008a56d7f..cf3646b563 100644
@@ -21 +22 @@
-@@ -411,6 +411,7 @@ Fidaullah Noonari <fidaullah.noonari at emumba.com>
+@@ -393,6 +393,7 @@ Fidaullah Noonari <fidaullah.noonari at emumba.com>
@@ -27 +27,0 @@
- Francesco Mancino <francesco.mancino at tutus.se>
@@ -28,0 +29 @@
+ Francis Kelly <fkelly at nvidia.com> <fkelly at mellanox.com>
@@ -30 +31 @@
-index ebc69d8c3e..9987ead6c5 100644
+index 3d4e3b66cc..b263f23f17 100644
@@ -33 +34 @@
-@@ -509,7 +509,7 @@ the number of L2 or L3 cache memory misses is greatly reduced, hence one of the
+@@ -512,7 +512,7 @@ the number of L2 or L3 cache memory misses is greatly reduced, hence one of the