[v2] doc: fix mlx5 flow integrity hardware support

Message ID 20220616084314.6464-1-getelson@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series [v2] doc: fix mlx5 flow integrity hardware support |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/github-robot: build success github build: passed
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-abi-testing success Testing PASS

Commit Message

Gregory Etelson June 16, 2022, 8:43 a.m. UTC
  Current MLX5 PMD documentation stays that entire `ConnentX-6` family
supports flow integrity feature.

Flow integrity offload is not supported on vanilla `ConnectX-6`.
It is available on `ConnectX-6 DX`, `ConnectX-6 LX` and
`BlueField-2`.

Cc: stable@dpdk.org

Fixes: 79f8952783d0 ("net/mlx5: support integrity flow item")

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
v2: Update Mellanox hardware types that support integrity bits. 
---
 doc/guides/nics/mlx5.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
  

Comments

Raslan Darawsheh June 20, 2022, 8:03 a.m. UTC | #1
Hi,

> -----Original Message-----
> From: Gregory Etelson <getelson@nvidia.com>
> Sent: Thursday, June 16, 2022 11:43 AM
> To: dev@dpdk.org
> Cc: Gregory Etelson <getelson@nvidia.com>; Matan Azrad
> <matan@nvidia.com>; Raslan Darawsheh <rasland@nvidia.com>;
> stable@dpdk.org; Slava Ovsiienko <viacheslavo@nvidia.com>
> Subject: [PATCH v2] doc: fix mlx5 flow integrity hardware support
> 
> Current MLX5 PMD documentation stays that entire `ConnentX-6` family
> supports flow integrity feature.
> 
> Flow integrity offload is not supported on vanilla `ConnectX-6`.
> It is available on `ConnectX-6 DX`, `ConnectX-6 LX` and `BlueField-2`.
> 
> Cc: stable@dpdk.org
> 
> Fixes: 79f8952783d0 ("net/mlx5: support integrity flow item")
> 
> Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> ---
> v2: Update Mellanox hardware types that support integrity bits.
> ---

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh
  

Patch

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index f41703277e..978886ad88 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -458,7 +458,7 @@  Limitations
 
 - Integrity:
 
-  - Integrity offload is enabled for **ConnectX-6** family.
+  - Integrity offload is enabled starting from **ConnectX-6 DX**.
   - Verification bits provided by the hardware are ``l3_ok``, ``ipv4_csum_ok``, ``l4_ok``, ``l4_csum_ok``.
   - ``level`` value 0 references outer headers.
   - Multiple integrity items not supported in a single flow rule.