diff mbox

[dpdk-dev,08/28] eal/arm64: define smp barrier definition for arm64

Message ID 1481680558-4003-9-git-send-email-jerin.jacob@caviumnetworks.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel compilation success Compilation OK

Commit Message

Jerin Jacob Dec. 14, 2016, 1:55 a.m. UTC 
  dmb instruction based barrier is used for smp version of memory barrier.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Comments

Jianbo Liu Dec. 15, 2016, 8:13 a.m. UTC | #1 
On 14 December 2016 at 09:55, Jerin Jacob
<jerin.jacob@caviumnetworks.com> wrote:
> dmb instruction based barrier is used for smp version of memory barrier.
>
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> ---
>  lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
> index bc7de64..78ebea2 100644
> --- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
> +++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
> @@ -82,11 +82,11 @@ static inline void rte_rmb(void)
>         dsb(ld);
>  }
>
> -#define rte_smp_mb() rte_mb()
> +#define rte_smp_mb() dmb(ish)
>
> -#define rte_smp_wmb() rte_wmb()
> +#define rte_smp_wmb() dmb(ishst)
>
> -#define rte_smp_rmb() rte_rmb()
> +#define rte_smp_rmb() dmb(ishld)
>

rte_*mb are inline functions, while rte_smp_*mb are macro. As they are
all derived from dsb/dmb, can you keep them consistent?

>  #ifdef __cplusplus
>  }
> --
> 2.5.5
>
Jerin Jacob Dec. 15, 2016, 8:20 a.m. UTC | #2 
On Thu, Dec 15, 2016 at 04:13:33PM +0800, Jianbo Liu wrote:
> On 14 December 2016 at 09:55, Jerin Jacob
> <jerin.jacob@caviumnetworks.com> wrote:
> > dmb instruction based barrier is used for smp version of memory barrier.
> >
> > Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> > ---
> >  lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
> > index bc7de64..78ebea2 100644
> > --- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
> > +++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
> > @@ -82,11 +82,11 @@ static inline void rte_rmb(void)
> >         dsb(ld);
> >  }
> >
> > -#define rte_smp_mb() rte_mb()
> > +#define rte_smp_mb() dmb(ish)
> >
> > -#define rte_smp_wmb() rte_wmb()
> > +#define rte_smp_wmb() dmb(ishst)
> >
> > -#define rte_smp_rmb() rte_rmb()
> > +#define rte_smp_rmb() dmb(ishld)
> >
> 
> rte_*mb are inline functions, while rte_smp_*mb are macro. As they are
> all derived from dsb/dmb, can you keep them consistent?

OK.I will add a separate patch in v2 series to change existing inline to
marco to keep consistent.


> 
> >  #ifdef __cplusplus
> >  }
> > --
> > 2.5.5
> >
diff mbox

Patch

diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
index bc7de64..78ebea2 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
@@ -82,11 +82,11 @@  static inline void rte_rmb(void)
 	dsb(ld);
 }
 
-#define rte_smp_mb() rte_mb()
+#define rte_smp_mb() dmb(ish)
 
-#define rte_smp_wmb() rte_wmb()
+#define rte_smp_wmb() dmb(ishst)
 
-#define rte_smp_rmb() rte_rmb()
+#define rte_smp_rmb() dmb(ishld)
 
 #ifdef __cplusplus
 }