diff mbox

[dpdk-dev,v2,12/30] net/ixgbe/base: fix SGMII link setup for M88 PHYs

Message ID 1482313694-31602-13-git-send-email-wei.dai@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel compilation success Compilation OK

Commit Message

Wei Dai Dec. 21, 2016, 9:47 a.m. UTC 
  Fix ixgbe_setup_sgmii_m88 to set lane speed to autoneg instead of 1G
to prevent problems with link between PHYs

Fixes: d4b4c6845487 ("net/ixgbe/base: add X550em_a FW ALEF support")

CC: stable@dpdk.org

Signed-off-by: Wei Dai <wei.dai@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x550.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox

Patch

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index d5dffdf..5cf9e40 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -1778,7 +1778,7 @@  STATIC s32 ixgbe_setup_sgmii_m88(struct ixgbe_hw *hw, ixgbe_link_speed speed,
 		return rc;
 
 	flx_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_MASK;
-	flx_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_1G;
+	flx_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_AN;
 	flx_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_AN_EN;
 	flx_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SGMII_EN;
 	flx_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_AN37_EN;