diff mbox

[dpdk-dev,v3,20/29] net/ena: use eal I/O device memory read/write API

Message ID 1484212646-10338-21-git-send-email-jerin.jacob@caviumnetworks.com (mailing list archive)
State Superseded, archived
Headers

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel compilation success Compilation OK

Commit Message

Jerin Jacob Jan. 12, 2017, 9:17 a.m. UTC 
  From: Santosh Shukla <santosh.shukla@caviumnetworks.com>

Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.

CC: Jan Medala <jan@semihalf.com>
CC: Jakub Palider <jpa@semihalf.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Jan Medala <jan@semihalf.com>
---
 drivers/net/ena/base/ena_eth_com.h   |  2 +-
 drivers/net/ena/base/ena_plat_dpdk.h | 11 +++++++++--
 2 files changed, 10 insertions(+), 3 deletions(-)
diff mbox

Patch

diff --git a/drivers/net/ena/base/ena_eth_com.h b/drivers/net/ena/base/ena_eth_com.h
index 71a880c..ee62685 100644
--- a/drivers/net/ena/base/ena_eth_com.h
+++ b/drivers/net/ena/base/ena_eth_com.h
@@ -118,7 +118,7 @@  static inline int ena_com_write_sq_doorbell(struct ena_com_io_sq *io_sq)
 	ena_trc_dbg("write submission queue doorbell for queue: %d tail: %d\n",
 		    io_sq->qid, tail);
 
-	ENA_REG_WRITE32(tail, io_sq->db_addr);
+	ENA_REG_WRITE32_RELAXED(tail, io_sq->db_addr);
 
 	return 0;
 }
diff --git a/drivers/net/ena/base/ena_plat_dpdk.h b/drivers/net/ena/base/ena_plat_dpdk.h
index 87c3bf1..09d540a 100644
--- a/drivers/net/ena/base/ena_plat_dpdk.h
+++ b/drivers/net/ena/base/ena_plat_dpdk.h
@@ -48,6 +48,7 @@ 
 #include <rte_malloc.h>
 #include <rte_memzone.h>
 #include <rte_spinlock.h>
+#include <rte_io.h>
 
 #include <sys/time.h>
 
@@ -226,15 +227,21 @@  typedef uint64_t dma_addr_t;
 
 static inline void writel(u32 value, volatile void  *addr)
 {
-	*(volatile u32 *)addr = value;
+	rte_write32(value, addr);
+}
+
+static inline void writel_relaxed(u32 value, volatile void  *addr)
+{
+	rte_write32_relaxed(value, addr);
 }
 
 static inline u32 readl(const volatile void *addr)
 {
-	return *(const volatile u32 *)addr;
+	return rte_read32(addr);
 }
 
 #define ENA_REG_WRITE32(value, reg) writel((value), (reg))
+#define ENA_REG_WRITE32_RELAXED(value, reg) writel_relaxed((value), (reg))
 #define ENA_REG_READ32(reg) readl((reg))
 
 #define ATOMIC32_INC(i32_ptr) rte_atomic32_inc(i32_ptr)