[dpdk-dev,5/6] net/mlx5: implement descriptor status API
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Commit Message
Since there is no "descriptor done" flag like on Intel drivers, the
approach is different on mlx5 driver.
- for Tx, we call txq_complete() to free descriptors processed by
the hw, then we check if the descriptor is between tail and head
- for Rx, we need to browse the cqes, managing compressed ones,
to get the number of used descriptors.
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
---
drivers/net/mlx5/mlx5.c | 2 ++
drivers/net/mlx5/mlx5_rxtx.c | 83 ++++++++++++++++++++++++++++++++++++++++++++
drivers/net/mlx5/mlx5_rxtx.h | 2 ++
3 files changed, 87 insertions(+)
Comments
Hi Olivier,
On Wed, Mar 01, 2017 at 06:19:11PM +0100, Olivier Matz wrote:
> Since there is no "descriptor done" flag like on Intel drivers, the
> approach is different on mlx5 driver.
> - for Tx, we call txq_complete() to free descriptors processed by
> the hw, then we check if the descriptor is between tail and head
> - for Rx, we need to browse the cqes, managing compressed ones,
> to get the number of used descriptors.
>
> Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
> ---
> drivers/net/mlx5/mlx5.c | 2 ++
> drivers/net/mlx5/mlx5_rxtx.c | 83 ++++++++++++++++++++++++++++++++++++++++++++
> drivers/net/mlx5/mlx5_rxtx.h | 2 ++
> 3 files changed, 87 insertions(+)
>
> diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
> index d4bd469..4a6450c 100644
> --- a/drivers/net/mlx5/mlx5.c
> +++ b/drivers/net/mlx5/mlx5.c
> @@ -222,6 +222,8 @@ static const struct eth_dev_ops mlx5_dev_ops = {
> .rss_hash_update = mlx5_rss_hash_update,
> .rss_hash_conf_get = mlx5_rss_hash_conf_get,
> .filter_ctrl = mlx5_dev_filter_ctrl,
> + .rx_descriptor_status = mlx5_rx_descriptor_status,
> + .tx_descriptor_status = mlx5_tx_descriptor_status,
> };
>
> static struct {
> diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
> index 88b0354..b3375f6 100644
> --- a/drivers/net/mlx5/mlx5_rxtx.c
> +++ b/drivers/net/mlx5/mlx5_rxtx.c
> @@ -345,6 +345,89 @@ mlx5_tx_dbrec(struct txq *txq, volatile struct mlx5_wqe *wqe)
> }
>
> /**
> + * DPDK callback to check the status of a tx descriptor.
> + *
> + * @param dev
> + * Pointer to Ethernet device structure.
> + * @param[in] tx_queue_id
> + * The identifier of the tx queue.
> + * @param[in] offset
> + * The index of the descriptor in the ring.
> + *
> + * @return
> + * The status of the tx descriptor.
> + */
> +int
> +mlx5_tx_descriptor_status(struct rte_eth_dev *dev, uint16_t tx_queue_id,
> + uint16_t offset)
> +{
> + struct txq *txq = dev->data->tx_queues[tx_queue_id];
> + const unsigned int elts_n = 1 << txq->elts_n;
> + const unsigned int elts_cnt = elts_n - 1;
> + unsigned int used;
> +
> + txq_complete(txq);
> +
If you submit a v2 please remove this empty line.
> + used = (txq->elts_head - txq->elts_tail) & elts_cnt;
> + if (offset < used)
> + return RTE_ETH_TX_DESC_FULL;
> + return RTE_ETH_TX_DESC_DONE;
> +}
> +
> +/**
> + * DPDK callback to check the status of a rx descriptor.
> + *
> + * @param dev
> + * Pointer to Ethernet device structure.
> + * @param[in] tx_queue_id
> + * The identifier of the rx queue.
> + * @param[in] offset
> + * The index of the descriptor in the ring.
> + *
> + * @return
> + * The status of the rx descriptor.
> + */
> +int
> +mlx5_rx_descriptor_status(struct rte_eth_dev *dev, uint16_t rx_queue_id,
> + uint16_t offset)
> +{
> + struct rxq *rxq = dev->data->rx_queues[rx_queue_id];
> + struct rxq_zip *zip = &rxq->zip;
> + volatile struct mlx5_cqe *cqe;
> + const unsigned int cqe_n = (1 << rxq->cqe_n);
> + const unsigned int cqe_cnt = cqe_n - 1;
> + unsigned int cq_ci;
> + unsigned int used;
> +
> + /* if we are processing a compressed cqe */
> + if (zip->ai) {
> + used = zip->cqe_cnt - zip->ca;
> + cq_ci = zip->cq_ci;
> + } else {
> + used = 0;
> + cq_ci = rxq->cq_ci;
> + }
> + cqe = &(*rxq->cqes)[cq_ci & cqe_cnt];
> + while (check_cqe(cqe, cqe_n, cq_ci) == 0) {
> + int8_t op_own;
> + unsigned int n;
> +
> + op_own = cqe->op_own;
> + if (MLX5_CQE_FORMAT(op_own) == MLX5_COMPRESSED)
> + n = ntohl(cqe->byte_cnt);
> + else
> + n = 1;
> + cq_ci += n;
> + used += n;
> + cqe = &(*rxq->cqes)[cq_ci & cqe_cnt];
> + }
> + used = RTE_MIN(used, (1U << rxq->elts_n) - 1);
> + if (offset < used)
> + return RTE_ETH_RX_DESC_DONE;
> + return RTE_ETH_RX_DESC_AVAIL;
> +}
> +
> +/**
> * DPDK callback for TX.
> *
> * @param dpdk_txq
> diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
> index 41a34d7..e864dcd 100644
> --- a/drivers/net/mlx5/mlx5_rxtx.h
> +++ b/drivers/net/mlx5/mlx5_rxtx.h
> @@ -323,6 +323,8 @@ uint16_t mlx5_tx_burst_mpw_inline(void *, struct rte_mbuf **, uint16_t);
> uint16_t mlx5_rx_burst(void *, struct rte_mbuf **, uint16_t);
> uint16_t removed_tx_burst(void *, struct rte_mbuf **, uint16_t);
> uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
> +int mlx5_rx_descriptor_status(struct rte_eth_dev *, uint16_t, uint16_t);
> +int mlx5_tx_descriptor_status(struct rte_eth_dev *, uint16_t, uint16_t);
>
> /* mlx5_mr.c */
>
> --
> 2.8.1
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
@@ -222,6 +222,8 @@ static const struct eth_dev_ops mlx5_dev_ops = {
.rss_hash_update = mlx5_rss_hash_update,
.rss_hash_conf_get = mlx5_rss_hash_conf_get,
.filter_ctrl = mlx5_dev_filter_ctrl,
+ .rx_descriptor_status = mlx5_rx_descriptor_status,
+ .tx_descriptor_status = mlx5_tx_descriptor_status,
};
static struct {
@@ -345,6 +345,89 @@ mlx5_tx_dbrec(struct txq *txq, volatile struct mlx5_wqe *wqe)
}
/**
+ * DPDK callback to check the status of a tx descriptor.
+ *
+ * @param dev
+ * Pointer to Ethernet device structure.
+ * @param[in] tx_queue_id
+ * The identifier of the tx queue.
+ * @param[in] offset
+ * The index of the descriptor in the ring.
+ *
+ * @return
+ * The status of the tx descriptor.
+ */
+int
+mlx5_tx_descriptor_status(struct rte_eth_dev *dev, uint16_t tx_queue_id,
+ uint16_t offset)
+{
+ struct txq *txq = dev->data->tx_queues[tx_queue_id];
+ const unsigned int elts_n = 1 << txq->elts_n;
+ const unsigned int elts_cnt = elts_n - 1;
+ unsigned int used;
+
+ txq_complete(txq);
+
+ used = (txq->elts_head - txq->elts_tail) & elts_cnt;
+ if (offset < used)
+ return RTE_ETH_TX_DESC_FULL;
+ return RTE_ETH_TX_DESC_DONE;
+}
+
+/**
+ * DPDK callback to check the status of a rx descriptor.
+ *
+ * @param dev
+ * Pointer to Ethernet device structure.
+ * @param[in] tx_queue_id
+ * The identifier of the rx queue.
+ * @param[in] offset
+ * The index of the descriptor in the ring.
+ *
+ * @return
+ * The status of the rx descriptor.
+ */
+int
+mlx5_rx_descriptor_status(struct rte_eth_dev *dev, uint16_t rx_queue_id,
+ uint16_t offset)
+{
+ struct rxq *rxq = dev->data->rx_queues[rx_queue_id];
+ struct rxq_zip *zip = &rxq->zip;
+ volatile struct mlx5_cqe *cqe;
+ const unsigned int cqe_n = (1 << rxq->cqe_n);
+ const unsigned int cqe_cnt = cqe_n - 1;
+ unsigned int cq_ci;
+ unsigned int used;
+
+ /* if we are processing a compressed cqe */
+ if (zip->ai) {
+ used = zip->cqe_cnt - zip->ca;
+ cq_ci = zip->cq_ci;
+ } else {
+ used = 0;
+ cq_ci = rxq->cq_ci;
+ }
+ cqe = &(*rxq->cqes)[cq_ci & cqe_cnt];
+ while (check_cqe(cqe, cqe_n, cq_ci) == 0) {
+ int8_t op_own;
+ unsigned int n;
+
+ op_own = cqe->op_own;
+ if (MLX5_CQE_FORMAT(op_own) == MLX5_COMPRESSED)
+ n = ntohl(cqe->byte_cnt);
+ else
+ n = 1;
+ cq_ci += n;
+ used += n;
+ cqe = &(*rxq->cqes)[cq_ci & cqe_cnt];
+ }
+ used = RTE_MIN(used, (1U << rxq->elts_n) - 1);
+ if (offset < used)
+ return RTE_ETH_RX_DESC_DONE;
+ return RTE_ETH_RX_DESC_AVAIL;
+}
+
+/**
* DPDK callback for TX.
*
* @param dpdk_txq
@@ -323,6 +323,8 @@ uint16_t mlx5_tx_burst_mpw_inline(void *, struct rte_mbuf **, uint16_t);
uint16_t mlx5_rx_burst(void *, struct rte_mbuf **, uint16_t);
uint16_t removed_tx_burst(void *, struct rte_mbuf **, uint16_t);
uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
+int mlx5_rx_descriptor_status(struct rte_eth_dev *, uint16_t, uint16_t);
+int mlx5_tx_descriptor_status(struct rte_eth_dev *, uint16_t, uint16_t);
/* mlx5_mr.c */