[dpdk-dev,2/6] config: add clang support for armv8a linuxapp

Message ID 20170510101643.30556-3-ashwin.sekhar@caviumnetworks.com (mailing list archive)
State Superseded, archived
Headers

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Ashwin Sekhar T K May 10, 2017, 10:16 a.m. UTC
  Added new config arm64-armv8a-linuxapp-clang

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
---
 config/defconfig_arm64-armv8a-linuxapp-clang | 56 ++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)
 create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang
  

Comments

Jerin Jacob May 11, 2017, 5:24 a.m. UTC | #1
-----Original Message-----
> Date: Wed, 10 May 2017 03:16:39 -0700
> From: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> To: thomas@monjalon.net, jerin.jacob@caviumnetworks.com,
>  maciej.czekaj@caviumnetworks.com, viktorin@rehivetech.com,
>  jianbo.liu@linaro.org, bruce.richardson@intel.com,
>  pablo.de.lara.guarch@intel.com, konstantin.ananyev@intel.com
> Cc: dev@dpdk.org, Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 2/6] config: add clang support for armv8a
>  linuxapp
> X-Mailer: git-send-email 2.13.0.rc1
> 
> Added new config arm64-armv8a-linuxapp-clang
> 
> Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
> ---
>  config/defconfig_arm64-armv8a-linuxapp-clang | 56 ++++++++++++++++++++++++++++
>  1 file changed, 56 insertions(+)
>  create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang
> 
> diff --git a/config/defconfig_arm64-armv8a-linuxapp-clang b/config/defconfig_arm64-armv8a-linuxapp-clang
> +#include "common_linuxapp"
> +
> +CONFIG_RTE_MACHINE="armv8a"
> +
> +CONFIG_RTE_ARCH="arm64"
> +CONFIG_RTE_ARCH_ARM64=y
> +CONFIG_RTE_ARCH_64=y
> +
> +CONFIG_RTE_FORCE_INTRINSICS=y
> +
> +CONFIG_RTE_TOOLCHAIN="clang"
> +CONFIG_RTE_TOOLCHAIN_CLANG=y
> +
> +# Maximum available cache line size in arm64 implementations.
> +# Setting to maximum available cache line size in generic config
> +# to address minimum DMA alignment across all arm64 implementations.
> +CONFIG_RTE_CACHE_LINE_SIZE=128
> +
> +CONFIG_RTE_EAL_IGB_UIO=n
> +
> +CONFIG_RTE_LIBRTE_FM10K_PMD=n
> +CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
> +CONFIG_RTE_LIBRTE_AVP_PMD=n
> +
> +CONFIG_RTE_SCHED_VECTOR=n

IMO, It is better to create common_armv8 config and let gcc and clang
use that to avoid duplicating the symbols.

> -- 
> 2.13.0.rc1
>
  
Sekhar, Ashwin May 11, 2017, 5:37 a.m. UTC | #2
On Thu, 2017-05-11 at 10:54 +0530, Jerin Jacob wrote:
> -----Original Message-----

> > 

> > Date: Wed, 10 May 2017 03:16:39 -0700

> > From: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>

> > To: thomas@monjalon.net, jerin.jacob@caviumnetworks.com,

> >  maciej.czekaj@caviumnetworks.com, viktorin@rehivetech.com,

> >  jianbo.liu@linaro.org, bruce.richardson@intel.com,

> >  pablo.de.lara.guarch@intel.com, konstantin.ananyev@intel.com

> > Cc: dev@dpdk.org, Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.c

> > om>

> > Subject: [dpdk-dev] [PATCH 2/6] config: add clang support for

> > armv8a

> >  linuxapp

> > X-Mailer: git-send-email 2.13.0.rc1

> > 

> > Added new config arm64-armv8a-linuxapp-clang

> > 

> > Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>

> > ---

> >  config/defconfig_arm64-armv8a-linuxapp-clang | 56

> > ++++++++++++++++++++++++++++

> >  1 file changed, 56 insertions(+)

> >  create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang

> > 

> > diff --git a/config/defconfig_arm64-armv8a-linuxapp-clang

> > b/config/defconfig_arm64-armv8a-linuxapp-clang

> > +#include "common_linuxapp"

> > +

> > +CONFIG_RTE_MACHINE="armv8a"

> > +

> > +CONFIG_RTE_ARCH="arm64"

> > +CONFIG_RTE_ARCH_ARM64=y

> > +CONFIG_RTE_ARCH_64=y

> > +

> > +CONFIG_RTE_FORCE_INTRINSICS=y

> > +

> > +CONFIG_RTE_TOOLCHAIN="clang"

> > +CONFIG_RTE_TOOLCHAIN_CLANG=y

> > +

> > +# Maximum available cache line size in arm64 implementations.

> > +# Setting to maximum available cache line size in generic config

> > +# to address minimum DMA alignment across all arm64

> > implementations.

> > +CONFIG_RTE_CACHE_LINE_SIZE=128

> > +

> > +CONFIG_RTE_EAL_IGB_UIO=n

> > +

> > +CONFIG_RTE_LIBRTE_FM10K_PMD=n

> > +CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n

> > +CONFIG_RTE_LIBRTE_AVP_PMD=n

> > +

> > +CONFIG_RTE_SCHED_VECTOR=n

> IMO, It is better to create common_armv8 config and let gcc and clang

> use that to avoid duplicating the symbols.

> 

For x86, this is the convention that is followed. There are separate
defconfigs for icc, gcc, clang with symbols duplicated. Do we need to
deviate from this convention for armv8a?
> >
  
Jerin Jacob May 11, 2017, 6:58 a.m. UTC | #3
-----Original Message-----
> Date: Thu, 11 May 2017 11:07:18 +0530
> From: "Sekhar, Ashwin" <Ashwin.Sekhar@cavium.com>
> To: "Jacob,  Jerin" <Jerin.JacobKollanukkaran@cavium.com>
> CC: "bruce.richardson@intel.com" <bruce.richardson@intel.com>,
>  "thomas@monjalon.net" <thomas@monjalon.net>,
>  "konstantin.ananyev@intel.com" <konstantin.ananyev@intel.com>,
>  "pablo.de.lara.guarch@intel.com" <pablo.de.lara.guarch@intel.com>,
>  "Czekaj, Maciej" <Maciej.Czekaj@cavium.com>, "viktorin@rehivetech.com"
>  <viktorin@rehivetech.com>, "dev@dpdk.org" <dev@dpdk.org>,
>  "jianbo.liu@linaro.org" <jianbo.liu@linaro.org>
> Subject: Re: [dpdk-dev] [PATCH 2/6] config: add clang support for armv8a
>  linuxapp
> 
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> <body>
> <font size="2"><span style="font-size:10pt;"><div class="PlainText">On Thu, 2017-05-11 at 10:54 &#43;0530, Jerin Jacob wrote:<br>
> &gt; -----Original Message-----<br>
> &gt; &gt; <br>
> &gt; &gt; Date: Wed, 10 May 2017 03:16:39 -0700<br>
> &gt; &gt; From: Ashwin Sekhar T K &lt;ashwin.sekhar@caviumnetworks.com&gt;<br>
> &gt; &gt; To: thomas@monjalon.net, jerin.jacob@caviumnetworks.com,<br>
> &gt; &gt; &nbsp;maciej.czekaj@caviumnetworks.com, viktorin@rehivetech.com,<br>
> &gt; &gt; &nbsp;jianbo.liu@linaro.org, bruce.richardson@intel.com,<br>
> &gt; &gt; &nbsp;pablo.de.lara.guarch@intel.com, konstantin.ananyev@intel.com<br>
> &gt; &gt; Cc: dev@dpdk.org, Ashwin Sekhar T K &lt;ashwin.sekhar@caviumnetworks.c<br>
> &gt; &gt; om&gt;<br>
> &gt; &gt; Subject: [dpdk-dev] [PATCH 2/6] config: add clang support for<br>
> &gt; &gt; armv8a<br>
> &gt; &gt; &nbsp;linuxapp<br>
> &gt; &gt; X-Mailer: git-send-email 2.13.0.rc1<br>
> &gt; &gt; <br>
> &gt; &gt; Added new config arm64-armv8a-linuxapp-clang<br>
> &gt; &gt; <br>
> &gt; &gt; Signed-off-by: Ashwin Sekhar T K &lt;ashwin.sekhar@caviumnetworks.com&gt;<br>
> &gt; &gt; ---<br>
> &gt; &gt; &nbsp;config/defconfig_arm64-armv8a-linuxapp-clang | 56<br>
> &gt; &gt; &#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;&#43;<br>
> &gt; &gt; &nbsp;1 file changed, 56 insertions(&#43;)<br>
> &gt; &gt; &nbsp;create mode 100644 config/defconfig_arm64-armv8a-linuxapp-clang<br>
> &gt; &gt; <br>
> &gt; &gt; diff --git a/config/defconfig_arm64-armv8a-linuxapp-clang<br>
> &gt; &gt; b/config/defconfig_arm64-armv8a-linuxapp-clang<br>
> &gt; &gt; &#43;#include &quot;common_linuxapp&quot;<br>
> &gt; &gt; &#43;<br>
> &gt; &gt; &#43;CONFIG_RTE_MACHINE=&quot;armv8a&quot;<br>
> &gt; &gt; &#43;<br>
> &gt; &gt; &#43;CONFIG_RTE_ARCH=&quot;arm64&quot;<br>
> &gt; &gt; &#43;CONFIG_RTE_ARCH_ARM64=y<br>
> &gt; &gt; &#43;CONFIG_RTE_ARCH_64=y<br>
> &gt; &gt; &#43;<br>
> &gt; &gt; &#43;CONFIG_RTE_FORCE_INTRINSICS=y<br>
> &gt; &gt; &#43;<br>
> &gt; &gt; &#43;CONFIG_RTE_TOOLCHAIN=&quot;clang&quot;<br>
> &gt; &gt; &#43;CONFIG_RTE_TOOLCHAIN_CLANG=y<br>
> &gt; &gt; &#43;<br>
> &gt; &gt; &#43;# Maximum available cache line size in arm64 implementations.<br>
> &gt; &gt; &#43;# Setting to maximum available cache line size in generic config<br>
> &gt; &gt; &#43;# to address minimum DMA alignment across all arm64<br>
> &gt; &gt; implementations.<br>
> &gt; &gt; &#43;CONFIG_RTE_CACHE_LINE_SIZE=128<br>
> &gt; &gt; &#43;<br>
> &gt; &gt; &#43;CONFIG_RTE_EAL_IGB_UIO=n<br>
> &gt; &gt; &#43;<br>
> &gt; &gt; &#43;CONFIG_RTE_LIBRTE_FM10K_PMD=n<br>
> &gt; &gt; &#43;CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n<br>
> &gt; &gt; &#43;CONFIG_RTE_LIBRTE_AVP_PMD=n<br>
> &gt; &gt; &#43;<br>
> &gt; &gt; &#43;CONFIG_RTE_SCHED_VECTOR=n<br>
> &gt; IMO, It is better to create common_armv8 config and let gcc and clang<br>
> &gt; use that to avoid duplicating the symbols.<br>
> &gt; <br>
> For x86, this is the convention that is followed. There are separate<br>
> defconfigs for icc, gcc, clang with symbols duplicated. Do we need to<br>
> deviate from this convention for armv8a?<br>

x86 case it bit different as the delta between common_config and x86 is very minimal.

for arm64 case, Following configs needs to be duplicated in both clang and gcc.

CONFIG_RTE_CACHE_LINE_SIZE=128
CONFIG_RTE_EAL_IGB_UIO=n
CONFIG_RTE_LIBRTE_FM10K_PMD=n
CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
CONFIG_RTE_LIBRTE_AVP_PMD=n
CONFIG_RTE_SCHED_VECTOR=n

That creates mutability issue. Creating a common common_armv8_linuxapp will
fix that issue.
  

Patch

diff --git a/config/defconfig_arm64-armv8a-linuxapp-clang b/config/defconfig_arm64-armv8a-linuxapp-clang
new file mode 100644
index 000000000..ff1cfa948
--- /dev/null
+++ b/config/defconfig_arm64-armv8a-linuxapp-clang
@@ -0,0 +1,56 @@ 
+#   BSD LICENSE
+#
+#   Copyright (C) Cavium networks 2017. All rights reserved.
+#
+#   Redistribution and use in source and binary forms, with or without
+#   modification, are permitted provided that the following conditions
+#   are met:
+#
+#     * Redistributions of source code must retain the above copyright
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in
+#       the documentation and/or other materials provided with the
+#       distribution.
+#     * Neither the name of Cavium networks nor the names of its
+#       contributors may be used to endorse or promote products derived
+#       from this software without specific prior written permission.
+#
+#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+#include "common_linuxapp"
+
+CONFIG_RTE_MACHINE="armv8a"
+
+CONFIG_RTE_ARCH="arm64"
+CONFIG_RTE_ARCH_ARM64=y
+CONFIG_RTE_ARCH_64=y
+
+CONFIG_RTE_FORCE_INTRINSICS=y
+
+CONFIG_RTE_TOOLCHAIN="clang"
+CONFIG_RTE_TOOLCHAIN_CLANG=y
+
+# Maximum available cache line size in arm64 implementations.
+# Setting to maximum available cache line size in generic config
+# to address minimum DMA alignment across all arm64 implementations.
+CONFIG_RTE_CACHE_LINE_SIZE=128
+
+CONFIG_RTE_EAL_IGB_UIO=n
+
+CONFIG_RTE_LIBRTE_FM10K_PMD=n
+CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
+CONFIG_RTE_LIBRTE_AVP_PMD=n
+
+CONFIG_RTE_SCHED_VECTOR=n