[dpdk-dev,08/14] net/dpaa2: add Rx queue count support

Message ID 1512710487-32388-9-git-send-email-hemant.agrawal@nxp.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Hemant Agrawal Dec. 8, 2017, 5:21 a.m. UTC
  Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)
  

Comments

Stephen Hemminger Dec. 12, 2017, 1:28 a.m. UTC | #1
On Fri, 8 Dec 2017 10:51:21 +0530
Hemant Agrawal <hemant.agrawal@nxp.com> wrote:

> @@ -1737,6 +1769,7 @@ static struct eth_dev_ops dpaa2_ethdev_ops = {

I know this is not part of the patch, but this diff highlighted another thing
to addreess in this family of driver.  The eth_dev_ops should be const if possible
that reduces change of bugs and other  issues.
  
Hemant Agrawal Dec. 12, 2017, 5:14 a.m. UTC | #2
On 12/12/2017 6:58 AM, Stephen Hemminger wrote:
> On Fri, 8 Dec 2017 10:51:21 +0530
> Hemant Agrawal <hemant.agrawal@nxp.com> wrote:
>
>> @@ -1737,6 +1769,7 @@ static struct eth_dev_ops dpaa2_ethdev_ops = {
>
> I know this is not part of the patch, but this diff highlighted another thing
> to addreess in this family of driver.  The eth_dev_ops should be const if possible
> that reduces change of bugs and other  issues.
>
Thanks for the comment.
We will take care of it in next set of revisions.

Regards,
Hemant
  

Patch

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 577bd8f..3e89d8d 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -51,6 +51,7 @@ 
 #include <dpaa2_hw_dpio.h>
 #include <mc/fsl_dpmng.h>
 #include "dpaa2_ethdev.h"
+#include <fsl_qbman_debug.h>
 
 struct rte_dpaa2_xstats_name_off {
 	char name[RTE_ETH_XSTATS_NAME_SIZE];
@@ -595,6 +596,37 @@  dpaa2_dev_tx_queue_release(void *q __rte_unused)
 	PMD_INIT_FUNC_TRACE();
 }
 
+static uint32_t
+dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
+{
+	int32_t ret;
+	struct dpaa2_dev_priv *priv = dev->data->dev_private;
+	struct dpaa2_queue *dpaa2_q;
+	struct qbman_swp *swp;
+	struct qbman_fq_query_np_rslt state;
+	uint32_t frame_cnt = 0;
+
+	PMD_INIT_FUNC_TRACE();
+
+	if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
+		ret = dpaa2_affine_qbman_swp();
+		if (ret) {
+			RTE_LOG(ERR, PMD, "Failure in affining portal\n");
+			return -EINVAL;
+		}
+	}
+	swp = DPAA2_PER_LCORE_PORTAL;
+
+	dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
+
+	if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) {
+		frame_cnt = qbman_fq_state_frame_count(&state);
+		RTE_LOG(DEBUG, PMD, "RX frame count for q(%d) is %u\n",
+			rx_queue_id, frame_cnt);
+	}
+	return frame_cnt;
+}
+
 static const uint32_t *
 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
 {
@@ -1737,6 +1769,7 @@  static struct eth_dev_ops dpaa2_ethdev_ops = {
 	.rx_queue_release  = dpaa2_dev_rx_queue_release,
 	.tx_queue_setup    = dpaa2_dev_tx_queue_setup,
 	.tx_queue_release  = dpaa2_dev_tx_queue_release,
+	.rx_queue_count       = dpaa2_dev_rx_queue_count,
 	.flow_ctrl_get	      = dpaa2_flow_ctrl_get,
 	.flow_ctrl_set	      = dpaa2_flow_ctrl_set,
 	.mac_addr_add         = dpaa2_dev_add_mac_addr,