diff mbox

[dpdk-dev,RFC] RFC build: prototype support for ARM builds

Message ID 20171219105338.198727-1-bruce.richardson@intel.com (mailing list archive)
State RFC, archived
Delegated to: Bruce Richardson
Headers

Checks

Context Check Description
ci/checkpatch warning coding style issues
ci/Intel-compilation success Compilation OK

Commit Message

Bruce Richardson Dec. 19, 2017, 10:53 a.m. UTC 
  Add some skeleton files to enable compiling for ARM target. This has been
tested by doing a cross-compile for armv8-a type using the linaro gcc
toolchain.

	meson arm-build --cross-file aarch64_cross.txt
	ninja -C arm-build

where aarch64_cross.txt contained the following

	[binaries]
	c = 'aarch64-linux-gnu-gcc'
	cpp = 'aarch64-linux-gnu-cpp'
	ar = 'aarch64-linux-gnu-ar'

	[host_machine]
	system = 'linux'
	cpu_family = 'aarch64'
	cpu = 'armv8-a'
	endian = 'little'

It is hoped that those working on arm architecture can use this as a baseline
to add arm support - both native compiled and cross-compiled - to the meson
build.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
 config/arm/meson.build                             | 43 ++++++++++++++++
 config/meson.build                                 |  4 +-
 lib/librte_eal/common/arch/arm/meson.build         | 33 +++++++++++++
 lib/librte_eal/common/include/arch/arm/meson.build | 57 ++++++++++++++++++++++
 4 files changed, 136 insertions(+), 1 deletion(-)
 create mode 100644 config/arm/meson.build
 create mode 100644 lib/librte_eal/common/arch/arm/meson.build
 create mode 100644 lib/librte_eal/common/include/arch/arm/meson.build

Comments

Luca Boccassi Dec. 19, 2017, 1:27 p.m. UTC | #1 
On Tue, 2017-12-19 at 10:53 +0000, Bruce Richardson wrote:
> Add some skeleton files to enable compiling for ARM target. This has
> been
> tested by doing a cross-compile for armv8-a type using the linaro gcc
> toolchain.
> 
> 	meson arm-build --cross-file aarch64_cross.txt
> 	ninja -C arm-build
> 
> where aarch64_cross.txt contained the following
> 
> 	[binaries]
> 	c = 'aarch64-linux-gnu-gcc'
> 	cpp = 'aarch64-linux-gnu-cpp'
> 	ar = 'aarch64-linux-gnu-ar'
> 
> 	[host_machine]
> 	system = 'linux'
> 	cpu_family = 'aarch64'
> 	cpu = 'armv8-a'
> 	endian = 'little'
> 
> It is hoped that those working on arm architecture can use this as a
> baseline
> to add arm support - both native compiled and cross-compiled - to the
> meson
> build.

Can't comment on ARM functionality, but shouldn't the new files use
SPDX ids rather than the full license header?
Bruce Richardson Dec. 19, 2017, 2:17 p.m. UTC | #2 
On Tue, Dec 19, 2017 at 01:27:07PM +0000, Luca Boccassi wrote:
> On Tue, 2017-12-19 at 10:53 +0000, Bruce Richardson wrote:
> > Add some skeleton files to enable compiling for ARM target. This has
> > been
> > tested by doing a cross-compile for armv8-a type using the linaro gcc
> > toolchain.
> > 
> > 	meson arm-build --cross-file aarch64_cross.txt
> > 	ninja -C arm-build
> > 
> > where aarch64_cross.txt contained the following
> > 
> > 	[binaries]
> > 	c = 'aarch64-linux-gnu-gcc'
> > 	cpp = 'aarch64-linux-gnu-cpp'
> > 	ar = 'aarch64-linux-gnu-ar'
> > 
> > 	[host_machine]
> > 	system = 'linux'
> > 	cpu_family = 'aarch64'
> > 	cpu = 'armv8-a'
> > 	endian = 'little'
> > 
> > It is hoped that those working on arm architecture can use this as a
> > baseline
> > to add arm support - both native compiled and cross-compiled - to the
> > meson
> > build.
> 
> Can't comment on ARM functionality, but shouldn't the new files use
> SPDX ids rather than the full license header?
> 

Yes, they should. However, this is just a prototype patch used to verify
the cross-compile functionality of the build system and is not directly
intended for merge. A proper implementation should, I think, come from
those more familiar with arm architecture than I am. [Hence the CC of
Jerin and Hemant on the patch]. Because of that I didn't go back to edit
the license tag of the patch i.e. I was a bit lazy. :-)

/Bruce
diff mbox

Patch

diff --git a/config/arm/meson.build b/config/arm/meson.build
new file mode 100644
index 000000000..250958415
--- /dev/null
+++ b/config/arm/meson.build
@@ -0,0 +1,43 @@ 
+#   BSD LICENSE
+#
+#   Copyright(c) 2017 Intel Corporation.
+#   All rights reserved.
+#
+#   Redistribution and use in source and binary forms, with or without
+#   modification, are permitted provided that the following conditions
+#   are met:
+#
+#     * Redistributions of source code must retain the above copyright
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in
+#       the documentation and/or other materials provided with the
+#       distribution.
+#     * Neither the name of Intel Corporation nor the names of its
+#       contributors may be used to endorse or promote products derived
+#       from this software without specific prior written permission.
+#
+#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# for checking defines we need to use the correct compiler flags
+march_opt = '-march=@0@'.format(machine)
+
+dpdk_conf.set('RTE_ARCH_ARM', 1)
+if cc.sizeof('void *') == 8
+	dpdk_conf.set('RTE_ARCH_ARM64', 1)
+	dpdk_conf.set('RTE_ARCH_64', 1)
+else
+	dpdk_conf.set('RTE_ARCH_ARMv7', 1)
+endif
+dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
+dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
diff --git a/config/meson.build b/config/meson.build
index d9a8e9f2c..e1cd35da8 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -84,8 +84,10 @@  endforeach
 compile_time_cpuflags = []
 if host_machine.cpu_family().startswith('x86')
 	arch_subdir = 'x86'
-	subdir(arch_subdir)
+elif host_machine.cpu_family().startswith('arm') or host_machine.cpu_family().startswith('aarch')
+	arch_subdir = 'arm'
 endif
+subdir(arch_subdir)
 dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags))
 
 # set the install path for the drivers
diff --git a/lib/librte_eal/common/arch/arm/meson.build b/lib/librte_eal/common/arch/arm/meson.build
new file mode 100644
index 000000000..57158271d
--- /dev/null
+++ b/lib/librte_eal/common/arch/arm/meson.build
@@ -0,0 +1,33 @@ 
+#   BSD LICENSE
+#
+#   Copyright(c) 2017 Intel Corporation.
+#   All rights reserved.
+#
+#   Redistribution and use in source and binary forms, with or without
+#   modification, are permitted provided that the following conditions
+#   are met:
+#
+#     * Redistributions of source code must retain the above copyright
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in
+#       the documentation and/or other materials provided with the
+#       distribution.
+#     * Neither the name of Intel Corporation nor the names of its
+#       contributors may be used to endorse or promote products derived
+#       from this software without specific prior written permission.
+#
+#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+eal_common_arch_sources = files('rte_cpuflags.c',
+	'rte_cycles.c')
diff --git a/lib/librte_eal/common/include/arch/arm/meson.build b/lib/librte_eal/common/include/arch/arm/meson.build
new file mode 100644
index 000000000..c5d399bf1
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/meson.build
@@ -0,0 +1,57 @@ 
+#   BSD LICENSE
+#
+#   Copyright(c) 2017 Intel Corporation.
+#   All rights reserved.
+#
+#   Redistribution and use in source and binary forms, with or without
+#   modification, are permitted provided that the following conditions
+#   are met:
+#
+#     * Redistributions of source code must retain the above copyright
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in
+#       the documentation and/or other materials provided with the
+#       distribution.
+#     * Neither the name of Intel Corporation nor the names of its
+#       contributors may be used to endorse or promote products derived
+#       from this software without specific prior written permission.
+#
+#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+install_headers(
+	'rte_atomic_32.h',
+	'rte_atomic_64.h',
+	'rte_atomic.h',
+	'rte_byteorder.h',
+	'rte_cpuflags_32.h',
+	'rte_cpuflags_64.h',
+	'rte_cpuflags.h',
+	'rte_cycles_32.h',
+	'rte_cycles_64.h',
+	'rte_cycles.h',
+	'rte_io_64.h',
+	'rte_io.h',
+	'rte_memcpy_32.h',
+	'rte_memcpy_64.h',
+	'rte_memcpy.h',
+	'rte_pause_32.h',
+	'rte_pause_64.h',
+	'rte_pause.h',
+	'rte_prefetch_32.h',
+	'rte_prefetch_64.h',
+	'rte_prefetch.h',
+	'rte_rwlock.h',
+	'rte_spinlock.h',
+	'rte_vect.h',
+	subdir: get_option('include_subdir_arch'))