diff mbox

[dpdk-dev,v4] igb_uio: allow multi-process access

Message ID 1514844010-39793-1-git-send-email-xiao.w.wang@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Thomas Monjalon
Headers

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Xiao Wang Jan. 1, 2018, 10 p.m. UTC 
  In some case, one device are accessed by different processes via
different BARs, so one uio device may be opened by more than one
process, for this case we just need to enable interrupt once, and
pci_clear_master only when the last process closed.

Fixes: 5f6ff30dc507 ("igb_uio: fix interrupt enablement after FLR in VM")

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
---
v4:
- Make open/release function atomic, to ensure that other call
  won't return until the setup is really done.

v3:
- Use atomic_inc_return instead of atomic_inc and atomic_read.
- Ditto for atomic_dec.

v2:
- Make uio reference counter operation atomic.
---
 lib/librte_eal/linuxapp/igb_uio/igb_uio.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

Comments

Ferruh Yigit Jan. 16, 2018, 7:43 p.m. UTC | #1 
On 1/1/2018 10:00 PM, Xiao Wang wrote:
> In some case, one device are accessed by different processes via
> different BARs, so one uio device may be opened by more than one
> process, for this case we just need to enable interrupt once, and
> pci_clear_master only when the last process closed.
> 
> Fixes: 5f6ff30dc507 ("igb_uio: fix interrupt enablement after FLR in VM")
> 
> Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>

Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Thomas Monjalon Jan. 16, 2018, 11:37 p.m. UTC | #2 
16/01/2018 20:43, Ferruh Yigit:
> On 1/1/2018 10:00 PM, Xiao Wang wrote:
> > In some case, one device are accessed by different processes via
> > different BARs, so one uio device may be opened by more than one
> > process, for this case we just need to enable interrupt once, and
> > pci_clear_master only when the last process closed.
> > 
> > Fixes: 5f6ff30dc507 ("igb_uio: fix interrupt enablement after FLR in VM")

Cc: stable@dpdk.org

> > Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
> 
> Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>

Applied, thanks
diff mbox

Patch

diff --git a/lib/librte_eal/linuxapp/igb_uio/igb_uio.c b/lib/librte_eal/linuxapp/igb_uio/igb_uio.c
index a3a98c1..1826adb 100644
--- a/lib/librte_eal/linuxapp/igb_uio/igb_uio.c
+++ b/lib/librte_eal/linuxapp/igb_uio/igb_uio.c
@@ -45,6 +45,8 @@  struct rte_uio_pci_dev {
 	struct uio_info info;
 	struct pci_dev *pdev;
 	enum rte_intr_mode mode;
+	struct mutex lock;
+	int refcnt;
 };
 
 static char *intr_mode;
@@ -336,11 +338,18 @@  struct rte_uio_pci_dev {
 	struct pci_dev *dev = udev->pdev;
 	int err;
 
+	mutex_lock(&udev->lock);
+	if (++udev->refcnt > 1) {
+		mutex_unlock(&udev->lock);
+		return 0;
+	}
+
 	/* set bus master, which was cleared by the reset function */
 	pci_set_master(dev);
 
 	/* enable interrupts */
 	err = igbuio_pci_enable_interrupts(udev);
+	mutex_unlock(&udev->lock);
 	if (err) {
 		dev_err(&dev->dev, "Enable interrupt fails\n");
 		return err;
@@ -354,12 +363,19 @@  struct rte_uio_pci_dev {
 	struct rte_uio_pci_dev *udev = info->priv;
 	struct pci_dev *dev = udev->pdev;
 
+	mutex_lock(&udev->lock);
+	if (--udev->refcnt > 0) {
+		mutex_unlock(&udev->lock);
+		return 0;
+	}
+
 	/* disable interrupts */
 	igbuio_pci_disable_interrupts(udev);
 
 	/* stop the device from further DMA */
 	pci_clear_master(dev);
 
+	mutex_unlock(&udev->lock);
 	return 0;
 }
 
@@ -480,6 +496,7 @@  struct rte_uio_pci_dev {
 	if (!udev)
 		return -ENOMEM;
 
+	mutex_init(&udev->lock);
 	/*
 	 * enable device: ask low-level code to enable I/O and
 	 * memory
@@ -570,6 +587,7 @@  struct rte_uio_pci_dev {
 {
 	struct rte_uio_pci_dev *udev = pci_get_drvdata(dev);
 
+	mutex_destroy(&udev->lock);
 	sysfs_remove_group(&dev->dev.kobj, &dev_attr_grp);
 	uio_unregister_device(&udev->info);
 	igbuio_pci_release_iomem(&udev->info);