[dpdk-dev,v2] eal/ppc: fix compilation error with a broken else clause
Checks
Commit Message
From: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
Calling rte_smp_{w/r}mb macro expands into a compound block, which
would break compiling a else clause following it, if that calling
place has been terminated already with ";", as in below code.
This patch adds { } around this macro to allow compiling else too.
Fixes: d23a6bd04d ("eal/ppc: fix memory barrier for IBM POWER")
Fixes: 05c3fd7110 ("eal/ppc: atomic operations for IBM Power")
Signed-off-by: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
---
v2:
fixed ppc_64 atomic defines for a below error.
In file included from /tmp/dpdk/lib/librte_ring/rte_ring.h:372:0,
from /tmp/dpdk/lib/librte_ring/rte_ring.c:90:
/tmp/dpdk/lib/librte_ring/rte_ring_generic.h: In function ‘update_tail’:
/tmp/dpdk/lib/librte_ring/rte_ring_generic.h:75:2: error: ‘else’ without a previous ‘if’
else
^~~~
/tmp/dpdk/mk/internal/rte.compile-pre.mk:114: recipe for target 'rte_ring.o' failed
lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
Comments
30/01/2018 11:53, Gowrishankar:
> From: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
>
> Calling rte_smp_{w/r}mb macro expands into a compound block, which
> would break compiling a else clause following it, if that calling
> place has been terminated already with ";", as in below code.
> This patch adds { } around this macro to allow compiling else too.
>
> Fixes: d23a6bd04d ("eal/ppc: fix memory barrier for IBM POWER")
> Fixes: 05c3fd7110 ("eal/ppc: atomic operations for IBM Power")
>
> Signed-off-by: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
Applied, thanks
@@ -64,9 +64,9 @@
* occur before the STORE operations generated after.
*/
#ifdef RTE_ARCH_64
-#define rte_wmb() {asm volatile("lwsync" : : : "memory"); }
+#define rte_wmb() asm volatile("lwsync" : : : "memory")
#else
-#define rte_wmb() {asm volatile("sync" : : : "memory"); }
+#define rte_wmb() asm volatile("sync" : : : "memory")
#endif
/**
@@ -76,9 +76,9 @@
* occur before the LOAD operations generated after.
*/
#ifdef RTE_ARCH_64
-#define rte_rmb() {asm volatile("lwsync" : : : "memory"); }
+#define rte_rmb() asm volatile("lwsync" : : : "memory")
#else
-#define rte_rmb() {asm volatile("sync" : : : "memory"); }
+#define rte_rmb() asm volatile("sync" : : : "memory")
#endif
#define rte_smp_mb() rte_mb()