[dpdk-dev] example exception_path: cache align per CPU stats

Message ID 20180213034317.28219-1-dustin@null-ptr.net (mailing list archive)
State Superseded, archived
Headers

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Dustin Lundquist Feb. 13, 2018, 3:43 a.m. UTC
  Align stats structure to cache line to prevent bouncing per CPU stats
structure between cache lines.

Signed-off-by: Dustin Lundquist <dustin@null-ptr.net>
---
 examples/exception_path/main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
  

Comments

Remy Horton Feb. 13, 2018, 8:40 a.m. UTC | #1
Patch ought to also have:

Fixes: af75078fece3 ("first public release")

Otherwise looks good to me. I'm not the maintainer so have only done 
basic smoke tests.

On 13/02/2018 03:43, Dustin Lundquist wrote:
[..]
> Signed-off-by: Dustin Lundquist <dustin@null-ptr.net>
> ---
>  examples/exception_path/main.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by: Remy Horton <remy.horton@intel.com>
  

Patch

diff --git a/examples/exception_path/main.c b/examples/exception_path/main.c
index 280a50451..3e5b1e718 100644
--- a/examples/exception_path/main.c
+++ b/examples/exception_path/main.c
@@ -108,7 +108,7 @@  struct stats {
 	uint64_t rx;
 	uint64_t tx;
 	uint64_t dropped;
-};
+} __rte_cache_aligned;
 
 /* Array of lcore-specific stats */
 static struct stats lcore_stats[RTE_MAX_LCORE];