diff mbox

[dpdk-dev,1/2] net/mlx5: fix setting offsets for SW parser

Message ID 20180522065058.21969-1-yskoh@mellanox.com (mailing list archive)
State Superseded, archived
Delegated to: Shahaf Shuler
Headers

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Yongseok Koh May 22, 2018, 6:50 a.m. UTC 
  Since ConnectX-5, SW parser just complements HW parser. SW parser starts to
engage only if HW parser can't reach a header. For the older devices, HW
parser will not kick in if any of SWP offsets is set. Therefore, all of the
L3 offsets should be set regardless of HW offload. As IPv6 doesn't have
header checksum, the mbuf can't have PKT_TX_[OUTER_]IP_CKSUM if outer or
inner L3 is IPv6.

And if inner packet isn't IP, the inner offsets shouldn't be set.

Fixes: 5f8ba81c4228 ("net/mlx5: support generic tunnel offloading")

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
---
 drivers/net/mlx5/mlx5_rxtx.h | 43 +++++++++++++++++++++++++++----------------
 1 file changed, 27 insertions(+), 16 deletions(-)
diff mbox

Patch

diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index a6017f0dd..1e4b2fdb9 100644
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -655,10 +655,13 @@  txq_mbuf_to_swp(struct mlx5_txq_data *txq, struct rte_mbuf *buf,
 		 uint8_t *offsets, uint8_t *swp_types)
 {
 	uint64_t tunnel = buf->ol_flags & PKT_TX_TUNNEL_MASK;
-	uint16_t idx;
-	uint16_t off;
+	const uint64_t csum_flags = buf->ol_flags & PKT_TX_L4_MASK;
+	const uint64_t inner_ip =
+		buf->ol_flags & (PKT_TX_IPV4 | PKT_TX_IPV6);
 	const uint64_t ol_flags_mask = PKT_TX_L4_MASK | PKT_TX_IPV6 |
 				       PKT_TX_OUTER_IPV6;
+	uint16_t idx;
+	uint16_t off;
 
 	if (likely(!tunnel || !txq->swp_en ||
 		   (tunnel != PKT_TX_TUNNEL_UDP && tunnel != PKT_TX_TUNNEL_IP)))
@@ -674,20 +677,28 @@  txq_mbuf_to_swp(struct mlx5_txq_data *txq, struct rte_mbuf *buf,
 	if (tunnel == PKT_TX_TUNNEL_UDP)
 		idx |= 1 << 9;
 	*swp_types = mlx5_swp_types_table[idx];
-	/* swp offsets. */
-	off = buf->outer_l2_len + (vlan ? 4 : 0); /* Outer L3 offset. */
-	if (tso || (buf->ol_flags & PKT_TX_OUTER_IP_CKSUM))
-		offsets[1] = off >> 1;
-	off += buf->outer_l3_len; /* Outer L4 offset. */
-	if (tunnel == PKT_TX_TUNNEL_UDP)
-		offsets[0] = off >> 1;
-	off += buf->l2_len; /* Inner L3 offset. */
-	if (tso || (buf->ol_flags & PKT_TX_IP_CKSUM))
-		offsets[3] = off >> 1;
-	off += buf->l3_len; /* Inner L4 offset. */
-	if (tso || ((buf->ol_flags & PKT_TX_L4_MASK) == PKT_TX_TCP_CKSUM) ||
-	    ((buf->ol_flags & PKT_TX_L4_MASK) == PKT_TX_UDP_CKSUM))
-		offsets[2] = off >> 1;
+	/*
+	 * Set offsets for SW parser. Since ConnectX-5, SW parser just
+	 * complements HW parser. SW parser starts to engage only if HW parser
+	 * can't reach a header. For the older devices, HW parser will not kick
+	 * in if any of SWP offsets is set. Therefore, all of the L3 offsets
+	 * should be set regardless of HW offload.
+	 */
+	off = buf->outer_l2_len + (vlan ? 4 : 0);
+	offsets[1] = off >> 1; /* Outer L3 offset. */
+	if (tunnel == PKT_TX_TUNNEL_UDP) {
+		off += buf->outer_l3_len;
+		offsets[0] = off >> 1; /* Outer L4 offset. */
+	}
+	if (inner_ip) {
+		off += buf->l2_len;
+		offsets[3] = off >> 1; /* Inner L3 offset. */
+		if (csum_flags == PKT_TX_TCP_CKSUM || tso ||
+		    csum_flags == PKT_TX_UDP_CKSUM) {
+			off += buf->l3_len;
+			offsets[2] = off >> 1; /* Inner L4 offset. */
+		}
+	}
 }
 
 /**