[dpdk-dev,v2] net/mlx5: fix GRE flow rule

Message ID 20180524175648.14255-1-yskoh@mellanox.com (mailing list archive)
State Rejected, archived
Delegated to: Shahaf Shuler
Headers

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Yongseok Koh May 24, 2018, 5:56 p.m. UTC
  Creating a flow having pattern from the middle of a packet is allowed. For
example,

  testpmd> flow create 0 ingress pattern vxlan vni is 20 / end actions ...

Device can parse GRE protocol number in outer IP header but specifying from
GRE header can't differentiate it from VxLAN tunnel. As a result, the
following rule will be interpreted as a wildcard rule, which always matches
any packet.

  testpmd> flow create 0 ingress pattern gre / end actions ...

Fixes: 96c6c65a10d2 ("net/mlx5: support GRE tunnel flow")
Fixes: 1f106da2bf7b ("net/mlx5: support MPLS-in-GRE and MPLS-in-UDP")
Cc: stable@dpdk.org

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
---

v2:
* amend commit message.
* remove GRE entry from the head item regardless of HW support.

 drivers/net/mlx5/mlx5_flow.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)
  

Comments

Yongseok Koh June 19, 2018, 11:23 p.m. UTC | #1
> On May 24, 2018, at 10:56 AM, Yongseok Koh <yskoh@mellanox.com> wrote:
> 
> Creating a flow having pattern from the middle of a packet is allowed. For
> example,
> 
>  testpmd> flow create 0 ingress pattern vxlan vni is 20 / end actions ...
> 
> Device can parse GRE protocol number in outer IP header but specifying from
> GRE header can't differentiate it from VxLAN tunnel. As a result, the
> following rule will be interpreted as a wildcard rule, which always matches
> any packet.
> 
>  testpmd> flow create 0 ingress pattern gre / end actions ...
> 
> Fixes: 96c6c65a10d2 ("net/mlx5: support GRE tunnel flow")
> Fixes: 1f106da2bf7b ("net/mlx5: support MPLS-in-GRE and MPLS-in-UDP")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
> ---
> 
> v2:
> * amend commit message.
> * remove GRE entry from the head item regardless of HW support.
> 
> drivers/net/mlx5/mlx5_flow.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
> index 994be05be..adb995f0d 100644
> --- a/drivers/net/mlx5/mlx5_flow.c
> +++ b/drivers/net/mlx5/mlx5_flow.c
> @@ -331,8 +331,7 @@ static const struct mlx5_flow_items mlx5_flow_items[] = {
> 	[RTE_FLOW_ITEM_TYPE_END] = {
> 		.items = ITEMS(RTE_FLOW_ITEM_TYPE_ETH,
> 			       RTE_FLOW_ITEM_TYPE_VXLAN,
> -			       RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
> -			       RTE_FLOW_ITEM_TYPE_GRE),
> +			       RTE_FLOW_ITEM_TYPE_VXLAN_GPE),
> 	},
> 	[RTE_FLOW_ITEM_TYPE_ETH] = {
> 		.items = ITEMS(RTE_FLOW_ITEM_TYPE_VLAN,
> -- 

Taking back this patch as the entire flow engine will be remodeled.
But this will be sent again for stable branches.

Thanks,
Yongseok
  

Patch

diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index 994be05be..adb995f0d 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -331,8 +331,7 @@  static const struct mlx5_flow_items mlx5_flow_items[] = {
 	[RTE_FLOW_ITEM_TYPE_END] = {
 		.items = ITEMS(RTE_FLOW_ITEM_TYPE_ETH,
 			       RTE_FLOW_ITEM_TYPE_VXLAN,
-			       RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
-			       RTE_FLOW_ITEM_TYPE_GRE),
+			       RTE_FLOW_ITEM_TYPE_VXLAN_GPE),
 	},
 	[RTE_FLOW_ITEM_TYPE_ETH] = {
 		.items = ITEMS(RTE_FLOW_ITEM_TYPE_VLAN,