net/mlx5: fix interrupt completion queue index wrapping

Message ID 20180823231033.24971-1-xuemingl@mellanox.com (mailing list archive)
State Accepted, archived
Delegated to: Shahaf Shuler
Headers
Series net/mlx5: fix interrupt completion queue index wrapping |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Xueming Li Aug. 23, 2018, 11:10 p.m. UTC
  Rxq cq_ci was 16 bits while hardware is expecting to wrap
around 24 bits, this caused interrupt failure after burst of packets.

Fixes: 43e9d9794cde ("net/mlx5: support upstream rdma-core")
Cc: Shahaf Shuler <shahafs@mellanox.com>

Signed-off-by: Xueming Li <xuemingl@mellanox.com>
---
 drivers/net/mlx5/mlx5_rxtx.c | 2 +-
 drivers/net/mlx5/mlx5_rxtx.h | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)
  

Comments

Yongseok Koh Aug. 28, 2018, 6:59 p.m. UTC | #1
> On Aug 23, 2018, at 4:10 PM, Xueming Li <xuemingl@mellanox.com> wrote:
> 
> Rxq cq_ci was 16 bits while hardware is expecting to wrap
> around 24 bits, this caused interrupt failure after burst of packets.
> 
> Fixes: 43e9d9794cde ("net/mlx5: support upstream rdma-core")
> Cc: Shahaf Shuler <shahafs@mellanox.com>
> 
> Signed-off-by: Xueming Li <xuemingl@mellanox.com>
> ---
Acked-by: Yongseok Koh <yskoh@mellanox.com>
 
Thanks
  
Shahaf Shuler Sept. 4, 2018, 6:21 a.m. UTC | #2
Tuesday, August 28, 2018 9:59 PM, Yongseok Koh:
> wrapping
> 
> > On Aug 23, 2018, at 4:10 PM, Xueming Li <xuemingl@mellanox.com> wrote:
> >
> > Rxq cq_ci was 16 bits while hardware is expecting to wrap around 24
> > bits, this caused interrupt failure after burst of packets.
> >
> > Fixes: 43e9d9794cde ("net/mlx5: support upstream rdma-core")
> > Cc: Shahaf Shuler <shahafs@mellanox.com>
> >
> > Signed-off-by: Xueming Li <xuemingl@mellanox.com>
> > ---
> Acked-by: Yongseok Koh <yskoh@mellanox.com>

Applied to next-net-mlx, thanks. 

> 
> Thanks
  
Ferruh Yigit Sept. 10, 2018, 10:59 a.m. UTC | #3
On 9/4/2018 7:21 AM, Shahaf Shuler wrote:
> Tuesday, August 28, 2018 9:59 PM, Yongseok Koh:
>> wrapping
>>
>>> On Aug 23, 2018, at 4:10 PM, Xueming Li <xuemingl@mellanox.com> wrote:
>>>
>>> Rxq cq_ci was 16 bits while hardware is expecting to wrap around 24
>>> bits, this caused interrupt failure after burst of packets.
>>>
>>> Fixes: 43e9d9794cde ("net/mlx5: support upstream rdma-core")
>>> Cc: Shahaf Shuler <shahafs@mellanox.com>

I assume you would want to backport the fix to stable releases, so adding:
Cc: stable@dpdk.org

Please shout if that is not the intention.

>>>
>>> Signed-off-by: Xueming Li <xuemingl@mellanox.com>
>>> ---
>> Acked-by: Yongseok Koh <yskoh@mellanox.com>
> 
> Applied to next-net-mlx, thanks. 
> 
>>
>> Thanks
  

Patch

diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 2d14f8a6e..558e6b60a 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -2097,7 +2097,7 @@  mlx5_rx_burst_mprq(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
 	const unsigned int wq_mask = (1 << rxq->elts_n) - 1;
 	volatile struct mlx5_cqe *cqe = &(*rxq->cqes)[rxq->cq_ci & cq_mask];
 	unsigned int i = 0;
-	uint16_t rq_ci = rxq->rq_ci;
+	uint32_t rq_ci = rxq->rq_ci;
 	uint16_t consumed_strd = rxq->consumed_strd;
 	struct mlx5_mprq_buf *buf = (*rxq->mprq_bufs)[rq_ci & wq_mask];
 
diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index 48ed2b209..d225b9c27 100644
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -97,10 +97,10 @@  struct mlx5_rxq_data {
 	volatile uint32_t *rq_db;
 	volatile uint32_t *cq_db;
 	uint16_t port_id;
-	uint16_t rq_ci;
+	uint32_t rq_ci;
 	uint16_t consumed_strd; /* Number of consumed strides in WQE. */
-	uint16_t rq_pi;
-	uint16_t cq_ci;
+	uint32_t rq_pi;
+	uint32_t cq_ci;
 	struct mlx5_mr_ctrl mr_ctrl; /* MR control descriptor. */
 	uint16_t mprq_max_memcpy_len; /* Maximum size of packet to memcpy. */
 	volatile void *wqes;