diff mbox series

[6/8] net/qede: correct offload not supported mask

Message ID 20181027104032.10251-7-xiaolong.ye@intel.com (mailing list archive)
State Rejected, archived
Delegated to: Ferruh Yigit
Headers
Series Correct XXX_TX_OFFLOAD_NOTSUP_MASK |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Xiaolong Ye Oct. 27, 2018, 10:40 a.m. UTC 
  Previously XXX_TX_OFFLOAD_NOTSUP_MASK is obtained via xor which would lead
to unexpected result, correct it by using a NOT-AND operation.

Fixes: 29540be7efce ("net/qede: support LRO/TSO offloads")

Cc: harish.patil@qlogic.com
Cc: stable@dpdk.org
Signed-off-by: Xiaolong Ye <xiaolong.ye@intel.com>
---
 drivers/net/qede/qede_rxtx.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Ferruh Yigit Nov. 2, 2018, 8:02 p.m. UTC | #1 
On 10/27/2018 11:40 AM, Xiaolong Ye wrote:
> Previously XXX_TX_OFFLOAD_NOTSUP_MASK is obtained via xor which would lead
> to unexpected result, correct it by using a NOT-AND operation.
> 
> Fixes: 29540be7efce ("net/qede: support LRO/TSO offloads")
> 
> Cc: harish.patil@qlogic.com
> Cc: stable@dpdk.org
> Signed-off-by: Xiaolong Ye <xiaolong.ye@intel.com>
> ---
>  drivers/net/qede/qede_rxtx.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/net/qede/qede_rxtx.h b/drivers/net/qede/qede_rxtx.h
> index d3a41e92e..9da059564 100644
> --- a/drivers/net/qede/qede_rxtx.h
> +++ b/drivers/net/qede/qede_rxtx.h
> @@ -159,7 +159,7 @@
>  			      PKT_TX_TUNNEL_GRE)
>  
>  #define QEDE_TX_OFFLOAD_NOTSUP_MASK \
> -	(PKT_TX_OFFLOAD_MASK ^ QEDE_TX_OFFLOAD_MASK)
> +	~(PKT_TX_OFFLOAD_MASK & QEDE_TX_OFFLOAD_MASK)

Hi Harish,

The qede usage can be problematic, because of how QEDE_TX_OFFLOAD_MASK set:

#define QEDE_TX_OFFLOAD_MASK (QEDE_TX_CSUM_OFFLOAD_MASK | \
                              PKT_TX_VLAN_PKT           | \
                              PKT_TX_TUNNEL_VXLAN       | \
                              PKT_TX_TUNNEL_GENEVE      | \
                              PKT_TX_TUNNEL_MPLSINUDP   | \
                              PKT_TX_TUNNEL_GRE)

I am not sure if OFFLOAD_NOTSUP_MASK works fine with multi-bit values, I think
you should set `PKT_TX_TUNNEL_MASK` here.

But please double check in case I am missing something.
Shaikh, Shahed Nov. 5, 2018, 6:52 a.m. UTC | #2 
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Ferruh Yigit
> Sent: Saturday, November 3, 2018 1:32 AM
> To: Patil, Harish <Harish.Patil@cavium.com>
> Cc: Xiaolong Ye <xiaolong.ye@intel.com>; Qi Zhang <qi.z.zhang@intel.com>;
> Beilei Xing <beilei.xing@intel.com>; dev@dpdk.org; stable@dpdk.org
> Subject: Re: [dpdk-dev] [dpdk-stable] [PATCH 6/8] net/qede: correct offload not
> supported mask
> 
> 
> On 10/27/2018 11:40 AM, Xiaolong Ye wrote:
> > Previously XXX_TX_OFFLOAD_NOTSUP_MASK is obtained via xor which would
> lead
> > to unexpected result, correct it by using a NOT-AND operation.
> >
> > Fixes: 29540be7efce ("net/qede: support LRO/TSO offloads")
> >
> > Cc: harish.patil@qlogic.com
> > Cc: stable@dpdk.org
> > Signed-off-by: Xiaolong Ye <xiaolong.ye@intel.com>
> > ---
> >  drivers/net/qede/qede_rxtx.h | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/net/qede/qede_rxtx.h b/drivers/net/qede/qede_rxtx.h
> > index d3a41e92e..9da059564 100644
> > --- a/drivers/net/qede/qede_rxtx.h
> > +++ b/drivers/net/qede/qede_rxtx.h
> > @@ -159,7 +159,7 @@
> >                             PKT_TX_TUNNEL_GRE)
> >
> >  #define QEDE_TX_OFFLOAD_NOTSUP_MASK \
> > -     (PKT_TX_OFFLOAD_MASK ^ QEDE_TX_OFFLOAD_MASK)
> > +     ~(PKT_TX_OFFLOAD_MASK & QEDE_TX_OFFLOAD_MASK)
> 
> Hi Harish,
> 
> The qede usage can be problematic, because of how QEDE_TX_OFFLOAD_MASK
> set:
> 
> #define QEDE_TX_OFFLOAD_MASK (QEDE_TX_CSUM_OFFLOAD_MASK | \
>                               PKT_TX_VLAN_PKT           | \
>                               PKT_TX_TUNNEL_VXLAN       | \
>                               PKT_TX_TUNNEL_GENEVE      | \
>                               PKT_TX_TUNNEL_MPLSINUDP   | \
>                               PKT_TX_TUNNEL_GRE)
> 
> I am not sure if OFFLOAD_NOTSUP_MASK works fine with multi-bit values, I
> think
> you should set `PKT_TX_TUNNEL_MASK` here.
> 
> But please double check in case I am missing something.


Hi Ferruh,

You are right. Tunnel types are multi bit values. Qede PMD does not support all tunneling protocol offloads which fall under PKT_TX_TUNNEL_MASK.
Not sure how to handle unsupported tunneling protocols in OFFLOAD_NOTSUP_MASK.

One way would be to set TX_TUNNEL_MASK in QEDE_TX_OFFLOAD_MASK and then check for unsupported tunnel protocols in tx_pkt_prepare().

Thanks,
Shahed
Ferruh Yigit Nov. 5, 2018, 10:21 a.m. UTC | #3 
On 11/5/2018 6:52 AM, Shaikh, Shahed wrote:
>> -----Original Message-----
>> From: dev <dev-bounces@dpdk.org> On Behalf Of Ferruh Yigit
>> Sent: Saturday, November 3, 2018 1:32 AM
>> To: Patil, Harish <Harish.Patil@cavium.com>
>> Cc: Xiaolong Ye <xiaolong.ye@intel.com>; Qi Zhang <qi.z.zhang@intel.com>;
>> Beilei Xing <beilei.xing@intel.com>; dev@dpdk.org; stable@dpdk.org
>> Subject: Re: [dpdk-dev] [dpdk-stable] [PATCH 6/8] net/qede: correct offload not
>> supported mask
>>
>>
>> On 10/27/2018 11:40 AM, Xiaolong Ye wrote:
>>> Previously XXX_TX_OFFLOAD_NOTSUP_MASK is obtained via xor which would
>> lead
>>> to unexpected result, correct it by using a NOT-AND operation.
>>>
>>> Fixes: 29540be7efce ("net/qede: support LRO/TSO offloads")
>>>
>>> Cc: harish.patil@qlogic.com
>>> Cc: stable@dpdk.org
>>> Signed-off-by: Xiaolong Ye <xiaolong.ye@intel.com>
>>> ---
>>>  drivers/net/qede/qede_rxtx.h | 2 +-
>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/net/qede/qede_rxtx.h b/drivers/net/qede/qede_rxtx.h
>>> index d3a41e92e..9da059564 100644
>>> --- a/drivers/net/qede/qede_rxtx.h
>>> +++ b/drivers/net/qede/qede_rxtx.h
>>> @@ -159,7 +159,7 @@
>>>                             PKT_TX_TUNNEL_GRE)
>>>
>>>  #define QEDE_TX_OFFLOAD_NOTSUP_MASK \
>>> -     (PKT_TX_OFFLOAD_MASK ^ QEDE_TX_OFFLOAD_MASK)
>>> +     ~(PKT_TX_OFFLOAD_MASK & QEDE_TX_OFFLOAD_MASK)
>>
>> Hi Harish,
>>
>> The qede usage can be problematic, because of how QEDE_TX_OFFLOAD_MASK
>> set:
>>
>> #define QEDE_TX_OFFLOAD_MASK (QEDE_TX_CSUM_OFFLOAD_MASK | \
>>                               PKT_TX_VLAN_PKT           | \
>>                               PKT_TX_TUNNEL_VXLAN       | \
>>                               PKT_TX_TUNNEL_GENEVE      | \
>>                               PKT_TX_TUNNEL_MPLSINUDP   | \
>>                               PKT_TX_TUNNEL_GRE)
>>
>> I am not sure if OFFLOAD_NOTSUP_MASK works fine with multi-bit values, I
>> think
>> you should set `PKT_TX_TUNNEL_MASK` here.
>>
>> But please double check in case I am missing something.
> 
> 
> Hi Ferruh,
> 
> You are right. Tunnel types are multi bit values. Qede PMD does not support all tunneling protocol offloads which fall under PKT_TX_TUNNEL_MASK.
> Not sure how to handle unsupported tunneling protocols in OFFLOAD_NOTSUP_MASK.
> 
> One way would be to set TX_TUNNEL_MASK in QEDE_TX_OFFLOAD_MASK and then check for unsupported tunnel protocols in tx_pkt_prepare().

+1, I think this would work

> 
> Thanks,
> Shahed
>
diff mbox series

Patch

diff --git a/drivers/net/qede/qede_rxtx.h b/drivers/net/qede/qede_rxtx.h
index d3a41e92e..9da059564 100644
--- a/drivers/net/qede/qede_rxtx.h
+++ b/drivers/net/qede/qede_rxtx.h
@@ -159,7 +159,7 @@ 
 			      PKT_TX_TUNNEL_GRE)
 
 #define QEDE_TX_OFFLOAD_NOTSUP_MASK \
-	(PKT_TX_OFFLOAD_MASK ^ QEDE_TX_OFFLOAD_MASK)
+	~(PKT_TX_OFFLOAD_MASK & QEDE_TX_OFFLOAD_MASK)
 
 /*
  * RX BD descriptor ring