[v2] net/ixgbe: fix TDH register setting issue
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Commit Message
The only time that software should write to the TDH register
is after a reset (hardware reset or CTRL.RST) and
before enabling the transmit function (TXDCTL.ENABLE).
If software were to write to this register while the transmit
function was enabled, the on-chip descriptor buffers might
be invalidated and the hardware could become confused.
cc stable@dpdk.org
Signed-off-by: Yanglong Wu <yanglong.wu@intel.com>
---
v2:
change fix commit
---
drivers/net/ixgbe/ixgbe_rxtx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Comments
> -----Original Message-----
> From: Wu, Yanglong
> Sent: Monday, November 19, 2018 9:59 PM
> To: dev@dpdk.org
> Cc: Zhang, Qi Z <qi.z.zhang@intel.com>; Wu, Jingjing <jingjing.wu@intel.com>;
> Wu, Yanglong <yanglong.wu@intel.com>
> Subject: [PATCH v2] net/ixgbe: fix TDH register setting issue
>
> The only time that software should write to the TDH register is after a reset
> (hardware reset or CTRL.RST) and before enabling the transmit function
> (TXDCTL.ENABLE).
> If software were to write to this register while the transmit function was
> enabled, the on-chip descriptor buffers might be invalidated and the hardware
> could become confused.
>
> cc stable@dpdk.org
Cc: stable@dpdk.org
> Signed-off-by: Yanglong Wu <yanglong.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Applied to dpdk-next-net-intel with adding below fix line
Fixes: 029fd06d40fa ("ixgbe: queue start and stop")
Thanks
Qi
@@ -5264,6 +5264,7 @@ ixgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
txq = dev->data->tx_queues[tx_queue_id];
+ IXGBE_WRITE_REG(hw, IXGBE_TDH(txq->reg_idx), 0);
txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txq->reg_idx));
txdctl |= IXGBE_TXDCTL_ENABLE;
IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txq->reg_idx), txdctl);
@@ -5281,7 +5282,6 @@ ixgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
tx_queue_id);
}
rte_wmb();
- IXGBE_WRITE_REG(hw, IXGBE_TDH(txq->reg_idx), 0);
IXGBE_WRITE_REG(hw, IXGBE_TDT(txq->reg_idx), 0);
dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;