[v3,6/6] doc: update Marvell OCTEON TX2 documentation
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Commit Message
From: Pavan Nikhilesh <pbhagavatula@marvell.com>
Update event octentx2 capabilities w.r.t event eth Rx/Tx capabilities.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
---
doc/guides/eventdevs/octeontx2.rst | 6 ++++++
1 file changed, 6 insertions(+)
@@ -32,6 +32,12 @@ Features of the OCTEON TX2 SSO PMD are:
time granularity of 2.5us.
- Up to 256 TIM rings aka event timer adapters.
- Up to 8 rings traversed in parallel.
+- HW managed packets enqueued from ethdev to eventdev exposed through event eth
+ RX adapter.
+- N:1 ethernet device Rx queue to Event queue mapping.
+- Lockfree Tx from event eth Tx adapter using ``DEV_TX_OFFLOAD_MT_LOCKFREE``
+ capability while maintaining receive packet order.
+- Full Rx/Tx offload support defined through ethdev queue config.
Prerequisites and Compilation procedure
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