diff mbox series

net/ice: add vni/tni support for flow inputset match

Message ID 1563924059-178037-1-git-send-email-ying.a.wang@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Qi Zhang
Headers
Series net/ice: add vni/tni support for flow inputset match |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/iol-Compile-Testing success Compile Testing PASS
ci/mellanox-Performance-Testing success Performance Testing PASS
ci/intel-Performance-Testing success Performance Testing PASS

Commit Message

Ying Wang July 23, 2019, 11:20 p.m. UTC 
  For VXLAN/NVGRE packet, vni/tni should be included in the matching
keys. This patch fixes this issue.

Fixes: d76116a4678f ("net/ice: add generic flow API")
Cc: stable@dpdk.org

Signed-off-by: Wang Ying A <ying.a.wang@intel.com>
---
 drivers/net/ice/ice_generic_flow.c |  8 ++++++++
 drivers/net/ice/ice_generic_flow.h | 18 ++++++++++++------
 2 files changed, 20 insertions(+), 6 deletions(-)

Comments

Qi Zhang July 24, 2019, 1:06 p.m. UTC | #1 
> -----Original Message-----
> From: Wang, Ying A
> Sent: Wednesday, July 24, 2019 7:21 AM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>
> Cc: Yang, Qiming <qiming.yang@intel.com>; dev@dpdk.org; Wang, Ying A
> <ying.a.wang@intel.com>; stable@dpdk.org
> Subject: [PATCH] net/ice: add vni/tni support for flow inputset match
> 
> For VXLAN/NVGRE packet, vni/tni should be included in the matching keys. This
> patch fixes this issue.
> 
> Fixes: d76116a4678f ("net/ice: add generic flow API")
> Cc: stable@dpdk.org

No need to cc stable since fix for current release.

> 
> Signed-off-by: Wang Ying A <ying.a.wang@intel.com>
> ---

Acked-by: Qi Zhang <qi.z.zhang@intel.com>

Thanks
Qi
Qi Zhang July 24, 2019, 1:12 p.m. UTC | #2 
> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Zhang, Qi Z
> Sent: Wednesday, July 24, 2019 9:07 PM
> To: Wang, Ying A <ying.a.wang@intel.com>
> Cc: Yang, Qiming <qiming.yang@intel.com>; dev@dpdk.org; stable@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH] net/ice: add vni/tni support for flow inputset
> match
> 
> 
> 
> > -----Original Message-----
> > From: Wang, Ying A
> > Sent: Wednesday, July 24, 2019 7:21 AM
> > To: Zhang, Qi Z <qi.z.zhang@intel.com>
> > Cc: Yang, Qiming <qiming.yang@intel.com>; dev@dpdk.org; Wang, Ying A
> > <ying.a.wang@intel.com>; stable@dpdk.org
> > Subject: [PATCH] net/ice: add vni/tni support for flow inputset match
> >
> > For VXLAN/NVGRE packet, vni/tni should be included in the matching
> > keys. This patch fixes this issue.
> >
> > Fixes: d76116a4678f ("net/ice: add generic flow API")
> > Cc: stable@dpdk.org
> 
> No need to cc stable since fix for current release.
> 
> >
> > Signed-off-by: Wang Ying A <ying.a.wang@intel.com>
> > ---
> 
> Acked-by: Qi Zhang <qi.z.zhang@intel.com>

Applied to dpdk-next-net-intel.

> 
> Thanks
> Qi
diff mbox series

Patch

diff --git a/drivers/net/ice/ice_generic_flow.c b/drivers/net/ice/ice_generic_flow.c
index 1d07c83..5fcf428 100644
--- a/drivers/net/ice/ice_generic_flow.c
+++ b/drivers/net/ice/ice_generic_flow.c
@@ -464,6 +464,10 @@  static uint64_t ice_get_flow_field(const struct rte_flow_item pattern[],
 					   "Invalid VXLAN item");
 				return 0;
 			}
+			if (vxlan_mask->vni[0] == UINT8_MAX &&
+					vxlan_mask->vni[1] == UINT8_MAX &&
+					vxlan_mask->vni[2] == UINT8_MAX)
+				input_set |= ICE_INSET_TUN_ID;
 			is_tunnel = 1;
 
 			break;
@@ -482,6 +486,10 @@  static uint64_t ice_get_flow_field(const struct rte_flow_item pattern[],
 					   "Invalid NVGRE item");
 				return 0;
 			}
+			if (nvgre_mask->tni[0] == UINT8_MAX &&
+					nvgre_mask->tni[1] == UINT8_MAX &&
+					nvgre_mask->tni[2] == UINT8_MAX)
+				input_set |= ICE_INSET_TUN_ID;
 			is_tunnel = 1;
 
 			break;
diff --git a/drivers/net/ice/ice_generic_flow.h b/drivers/net/ice/ice_generic_flow.h
index 2aa79e0..1953905 100644
--- a/drivers/net/ice/ice_generic_flow.h
+++ b/drivers/net/ice/ice_generic_flow.h
@@ -83,24 +83,30 @@  struct ice_flow_pattern {
 	ICE_INSET_IPV6_HOP_LIMIT | ICE_INSET_IPV6_TOS | ICE_INSET_ICMP6)
 #define INSET_TUNNEL_IPV4_TYPE1 ( \
 	ICE_INSET_TUN_IPV4_SRC | ICE_INSET_TUN_IPV4_DST | \
-	ICE_INSET_TUN_IPV4_TTL | ICE_INSET_TUN_IPV4_PROTO)
+	ICE_INSET_TUN_IPV4_TTL | ICE_INSET_TUN_IPV4_PROTO | \
+	ICE_INSET_TUN_ID)
 #define INSET_TUNNEL_IPV4_TYPE2 ( \
 	ICE_INSET_TUN_IPV4_SRC | ICE_INSET_TUN_IPV4_DST | \
 	ICE_INSET_TUN_IPV4_TTL | ICE_INSET_TUN_IPV4_PROTO | \
-	ICE_INSET_TUN_SRC_PORT | ICE_INSET_TUN_DST_PORT)
+	ICE_INSET_TUN_SRC_PORT | ICE_INSET_TUN_DST_PORT | \
+	ICE_INSET_TUN_ID)
 #define INSET_TUNNEL_IPV4_TYPE3 ( \
 	ICE_INSET_TUN_IPV4_SRC | ICE_INSET_TUN_IPV4_DST | \
-	ICE_INSET_TUN_IPV4_TTL | ICE_INSET_ICMP)
+	ICE_INSET_TUN_IPV4_TTL | ICE_INSET_ICMP | \
+	ICE_INSET_TUN_ID)
 #define INSET_TUNNEL_IPV6_TYPE1 ( \
 	ICE_INSET_TUN_IPV6_SRC | ICE_INSET_TUN_IPV6_DST | \
-	ICE_INSET_TUN_IPV6_TTL | ICE_INSET_TUN_IPV6_PROTO)
+	ICE_INSET_TUN_IPV6_TTL | ICE_INSET_TUN_IPV6_PROTO | \
+	ICE_INSET_TUN_ID)
 #define INSET_TUNNEL_IPV6_TYPE2 ( \
 	ICE_INSET_TUN_IPV6_SRC | ICE_INSET_TUN_IPV6_DST | \
 	ICE_INSET_TUN_IPV6_TTL | ICE_INSET_TUN_IPV6_PROTO | \
-	ICE_INSET_TUN_SRC_PORT | ICE_INSET_TUN_DST_PORT)
+	ICE_INSET_TUN_SRC_PORT | ICE_INSET_TUN_DST_PORT | \
+	ICE_INSET_TUN_ID)
 #define INSET_TUNNEL_IPV6_TYPE3 ( \
 	ICE_INSET_TUN_IPV6_SRC | ICE_INSET_TUN_IPV6_DST | \
-	ICE_INSET_TUN_IPV6_TTL | ICE_INSET_ICMP6)
+	ICE_INSET_TUN_IPV6_TTL | ICE_INSET_ICMP6 | \
+	ICE_INSET_TUN_ID)
 
 /* L2 */
 static enum rte_flow_item_type pattern_ethertype[] = {