[v2] drivers/octeontx2: fix recursive qint interrupts
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Commit Message
In case of QINT interrupt occurrence, SW fails to clear the QINT
line resulting in recursive interrupts because currently interrupt
handler gets the cause of the interrupt by reading
NIX_LF_RQ[SQ/CQ/AURA/POOL]_OP_INT but does not write 1 to clear
RQ[SQ/CQ/ERR]_INT field in respective NIX_LF_RQ[SQ/CQ/AURA/POOL]_OP_INT
registers.
Fixes: dc47ba15f645 ("net/octeontx2: handle queue specific error interrupts")
Fixes: 50b95c3ea7af ("mempool/octeontx2: add NPA IRQ handler")
Signed-off-by: Harman Kalra <hkalra@marvell.com>
---
drivers/mempool/octeontx2/otx2_mempool_irq.c | 2 +-
drivers/net/octeontx2/otx2_ethdev_irq.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
Comments
> -----Original Message-----
> From: Harman Kalra <hkalra@marvell.com>
> Sent: Thursday, July 25, 2019 3:57 PM
> To: Jerin Jacob Kollanukkaran <jerinj@marvell.com>; Nithin Kumar
> Dabilpuram <ndabilpuram@marvell.com>; Vamsi Krishna Attunuru
> <vattunuru@marvell.com>; Kiran Kumar Kokkilagadda
> <kirankumark@marvell.com>
> Cc: dev@dpdk.org; Harman Kalra <hkalra@marvell.com>
> Subject: [PATCH v2] drivers/octeontx2: fix recursive qint interrupts
>
> In case of QINT interrupt occurrence, SW fails to clear the QINT line resulting
> in recursive interrupts because currently interrupt handler gets the cause of
> the interrupt by reading NIX_LF_RQ[SQ/CQ/AURA/POOL]_OP_INT but does
> not write 1 to clear RQ[SQ/CQ/ERR]_INT field in respective
> NIX_LF_RQ[SQ/CQ/AURA/POOL]_OP_INT registers.
>
> Fixes: dc47ba15f645 ("net/octeontx2: handle queue specific error
> interrupts")
> Fixes: 50b95c3ea7af ("mempool/octeontx2: add NPA IRQ handler")
>
> Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
27/07/2019 13:56, Jerin Jacob Kollanukkaran:
> > -----Original Message-----
> > From: Harman Kalra <hkalra@marvell.com>
> > Sent: Thursday, July 25, 2019 3:57 PM
> > To: Jerin Jacob Kollanukkaran <jerinj@marvell.com>; Nithin Kumar
> > Dabilpuram <ndabilpuram@marvell.com>; Vamsi Krishna Attunuru
> > <vattunuru@marvell.com>; Kiran Kumar Kokkilagadda
> > <kirankumark@marvell.com>
> > Cc: dev@dpdk.org; Harman Kalra <hkalra@marvell.com>
> > Subject: [PATCH v2] drivers/octeontx2: fix recursive qint interrupts
> >
> > In case of QINT interrupt occurrence, SW fails to clear the QINT line resulting
> > in recursive interrupts because currently interrupt handler gets the cause of
> > the interrupt by reading NIX_LF_RQ[SQ/CQ/AURA/POOL]_OP_INT but does
> > not write 1 to clear RQ[SQ/CQ/ERR]_INT field in respective
> > NIX_LF_RQ[SQ/CQ/AURA/POOL]_OP_INT registers.
> >
> > Fixes: dc47ba15f645 ("net/octeontx2: handle queue specific error
> > interrupts")
> > Fixes: 50b95c3ea7af ("mempool/octeontx2: add NPA IRQ handler")
> >
> > Signed-off-by: Harman Kalra <hkalra@marvell.com>
>
> Acked-by: Jerin Jacob <jerinj@marvell.com>
Applied, thanks
@@ -123,7 +123,7 @@ npa_lf_q_irq_get_and_clear(struct otx2_npa_lf *lf, uint32_t q,
qint = reg & 0xff;
wdata &= mask;
- otx2_write64(wdata, lf->base + off);
+ otx2_write64(wdata | qint, lf->base + off);
return qint;
}
@@ -138,7 +138,7 @@ nix_lf_q_irq_get_and_clear(struct otx2_eth_dev *dev, uint16_t q,
qint = reg & 0xff;
wdata &= mask;
- otx2_write64(wdata, dev->base + off);
+ otx2_write64(wdata | qint, dev->base + off);
return qint;
}