diff mbox series

[RFC,v2] ethdev: extend RSS offload types

Message ID 1564101350-98092-1-git-send-email-simei.su@intel.com (mailing list archive)
State Superseded, archived
Delegated to: Ferruh Yigit
Headers
Series [RFC,v2] ethdev: extend RSS offload types |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Simei Su July 26, 2019, 12:35 a.m. UTC 
  From: Simei Su <simei.su@intel.com>

This RFC reserves several bits as input set selection from bottom
of the 64 bits. The flow type is combined with input set to
represent rss types.

Correct the input set mask to align with the definition in rte_ethdev.h.
for example:
    ETH_RSS_IPV4 | ETH_RSS_INSET_L3_SRC: hash on src ip address only
    ETH_RSS_IPV4_UDP | ETH_RSS_INSET_L4_DST: hash on src/dst IP and
				            dst UDP port
    ETH_RSS_L2_PAYLOAD | ETH_RSS_INSET_L2_DST: hash on dst mac address

Signed-off-by: Simei Su <simei.su@intel.com>
---
 lib/librte_ethdev/rte_ethdev.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

Comments

Ferruh Yigit July 26, 2019, 10:21 a.m. UTC | #1 
On 7/26/2019 1:35 AM, simei wrote:
> From: Simei Su <simei.su@intel.com>
> 
> This RFC reserves several bits as input set selection from bottom
> of the 64 bits. The flow type is combined with input set to
> represent rss types.
> 
> Correct the input set mask to align with the definition in rte_ethdev.h.
> for example:
>     ETH_RSS_IPV4 | ETH_RSS_INSET_L3_SRC: hash on src ip address only
>     ETH_RSS_IPV4_UDP | ETH_RSS_INSET_L4_DST: hash on src/dst IP and
> 				            dst UDP port
>     ETH_RSS_L2_PAYLOAD | ETH_RSS_INSET_L2_DST: hash on dst mac address
> 
> Signed-off-by: Simei Su <simei.su@intel.com>
> ---
>  lib/librte_ethdev/rte_ethdev.h | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
> index dc6596b..452d29f 100644
> --- a/lib/librte_ethdev/rte_ethdev.h
> +++ b/lib/librte_ethdev/rte_ethdev.h
> @@ -508,6 +508,18 @@ struct rte_eth_rss_conf {
>  #define ETH_RSS_GENEVE             (1ULL << RTE_ETH_FLOW_GENEVE)
>  #define ETH_RSS_NVGRE              (1ULL << RTE_ETH_FLOW_NVGRE)
>  
> +/*
> + * The following six macros are used combined with ETH_RSS_* to
> + * represent rss types. The structure rte_flow_action_rss.types is
> + * 64-bit wide and we reserve couple bits here for input set selection.
> + */
> +#define	ETH_RSS_INSET_L2_SRC       0x0400000000000000
> +#define	ETH_RSS_INSET_L2_DST       0x0800000000000000
> +#define	ETH_RSS_INSET_L3_SRC       0x1000000000000000
> +#define	ETH_RSS_INSET_L3_DST       0x2000000000000000
> +#define	ETH_RSS_INSET_L4_SRC       0x4000000000000000
> +#define	ETH_RSS_INSET_L4_DST       0x8000000000000000


A question, will it easier to represent/comprehend if we replace these as
(1ULL << ###) instead of too many zeros ?

> +
>  #define ETH_RSS_IP ( \
>  	ETH_RSS_IPV4 | \
>  	ETH_RSS_FRAG_IPV4 | \
>
Stephen Hemminger July 29, 2019, 3:30 p.m. UTC | #2 
On Fri, 26 Jul 2019 08:35:50 +0800
simei <simei.su@intel.com> wrote:

> +#define	ETH_RSS_INSET_L2_SRC       0x0400000000000000

This won't work on 32 bit systems you need to cast it or add a
unsigned long long modifier (ull or ULL)
Stephen Hemminger July 30, 2019, 3:50 p.m. UTC | #3 
On Fri, 26 Jul 2019 08:35:50 +0800
simei <simei.su@intel.com> wrote:

> From: Simei Su <simei.su@intel.com>
> 
> This RFC reserves several bits as input set selection from bottom
> of the 64 bits. The flow type is combined with input set to
> represent rss types.
> 
> Correct the input set mask to align with the definition in rte_ethdev.h.
> for example:
>     ETH_RSS_IPV4 | ETH_RSS_INSET_L3_SRC: hash on src ip address only
>     ETH_RSS_IPV4_UDP | ETH_RSS_INSET_L4_DST: hash on src/dst IP and
> 				            dst UDP port
>     ETH_RSS_L2_PAYLOAD | ETH_RSS_INSET_L2_DST: hash on dst mac address
> 
> Signed-off-by: Simei Su <simei.su@intel.com>

NAK to any patch that "reserves" bits for future use.

Please include the patch as part of a set of patches that actually implements
the functionality on a device.
Simei Su July 31, 2019, 2:57 a.m. UTC | #4 
> -----Original Message-----
> From: Stephen Hemminger [mailto:stephen@networkplumber.org]
> Sent: Tuesday, July 30, 2019 11:50 PM
> To: Su, Simei <simei.su@intel.com>
> Cc: Zhang, Qi Z <qi.z.zhang@intel.com>; Wu, Jingjing <jingjing.wu@intel.com>;
> adrien.mazarguil@6wind.com; dev@dpdk.org
> Subject: Re: [dpdk-dev] [RFC,v2] ethdev: extend RSS offload types
> 
> On Fri, 26 Jul 2019 08:35:50 +0800
> simei <simei.su@intel.com> wrote:
> 
> > From: Simei Su <simei.su@intel.com>
> >
> > This RFC reserves several bits as input set selection from bottom of
> > the 64 bits. The flow type is combined with input set to represent rss
> > types.
> >
> > Correct the input set mask to align with the definition in rte_ethdev.h.
> > for example:
> >     ETH_RSS_IPV4 | ETH_RSS_INSET_L3_SRC: hash on src ip address only
> >     ETH_RSS_IPV4_UDP | ETH_RSS_INSET_L4_DST: hash on src/dst IP and
> > 				            dst UDP port
> >     ETH_RSS_L2_PAYLOAD | ETH_RSS_INSET_L2_DST: hash on dst mac
> address
> >
> > Signed-off-by: Simei Su <simei.su@intel.com>
> 
> NAK to any patch that "reserves" bits for future use.
> 
> Please include the patch as part of a set of patches that actually implements the
> functionality on a device.
 
  Ok. Later, I will add the implementation functionality as a set of patches.
diff mbox series

Patch

diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index dc6596b..452d29f 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -508,6 +508,18 @@  struct rte_eth_rss_conf {
 #define ETH_RSS_GENEVE             (1ULL << RTE_ETH_FLOW_GENEVE)
 #define ETH_RSS_NVGRE              (1ULL << RTE_ETH_FLOW_NVGRE)
 
+/*
+ * The following six macros are used combined with ETH_RSS_* to
+ * represent rss types. The structure rte_flow_action_rss.types is
+ * 64-bit wide and we reserve couple bits here for input set selection.
+ */
+#define	ETH_RSS_INSET_L2_SRC       0x0400000000000000
+#define	ETH_RSS_INSET_L2_DST       0x0800000000000000
+#define	ETH_RSS_INSET_L3_SRC       0x1000000000000000
+#define	ETH_RSS_INSET_L3_DST       0x2000000000000000
+#define	ETH_RSS_INSET_L4_SRC       0x4000000000000000
+#define	ETH_RSS_INSET_L4_DST       0x8000000000000000
+
 #define ETH_RSS_IP ( \
 	ETH_RSS_IPV4 | \
 	ETH_RSS_FRAG_IPV4 | \