diff mbox series

[v4] examples/l3fwd: fix unaligned memory access

Message ID 20190726135858.55792-1-hariprasad.govindharajan@intel.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series [v4] examples/l3fwd: fix unaligned memory access |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/iol-Compile-Testing success Compile Testing PASS

Commit Message

Hariprasad Govindharajan July 26, 2019, 1:58 p.m. UTC 
  Fix unaligned memory access when reading IPv6 header which
leads to segmentation fault by changing aligned memory read
to unaligned memory read.

Bugzilla ID: 279
Fixes: 64d3955de1de ("examples/l3fwd: fix ARM build")
Cc: maciej.czekaj@caviumnetworks.com
Cc: stable@dpdk.org
Signed-off-by: hgovindh <hariprasad.govindharajan@intel.com>
---
V2: Added functions which will do unaligned load based on the
underlying architecture

V3: Removed functions added in V2 and replaced them with if macros
which will branch based on the underlying architecture. As per my
understanding since the unaligned load affects only Intel arch,
I added that function branch and left the original code for other arc.
Can someone with ARM and PowerPC arch, could you please validate this
patch and let me know?
---
 examples/l3fwd/l3fwd_em.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Thomas Monjalon July 30, 2019, 8:50 a.m. UTC | #1 
Review please?

26/07/2019 15:58, hgovindh:
> Fix unaligned memory access when reading IPv6 header which
> leads to segmentation fault by changing aligned memory read
> to unaligned memory read.
> 
> Bugzilla ID: 279
> Fixes: 64d3955de1de ("examples/l3fwd: fix ARM build")
> Cc: maciej.czekaj@caviumnetworks.com
> Cc: stable@dpdk.org
> Signed-off-by: hgovindh <hariprasad.govindharajan@intel.com>
> --- a/examples/l3fwd/l3fwd_em.c
> +++ b/examples/l3fwd/l3fwd_em.c
> +#if defined RTE_ARCH_X86
> +	key.xmm[1] = _mm_loadu_si128(data1);
> +#else
>  	key.xmm[1] = *(xmm_t *)data1;
> -
> +#endif
Bruce Richardson July 30, 2019, 9:47 a.m. UTC | #2 
On Tue, Jul 30, 2019 at 10:50:14AM +0200, Thomas Monjalon wrote:
> Review please?
> 
> 26/07/2019 15:58, hgovindh:
> > Fix unaligned memory access when reading IPv6 header which
> > leads to segmentation fault by changing aligned memory read
> > to unaligned memory read.
> > 
> > Bugzilla ID: 279
> > Fixes: 64d3955de1de ("examples/l3fwd: fix ARM build")
> > Cc: maciej.czekaj@caviumnetworks.com
> > Cc: stable@dpdk.org
> > Signed-off-by: hgovindh <hariprasad.govindharajan@intel.com>
> > --- a/examples/l3fwd/l3fwd_em.c
> > +++ b/examples/l3fwd/l3fwd_em.c
> > +#if defined RTE_ARCH_X86
> > +	key.xmm[1] = _mm_loadu_si128(data1);
> > +#else
> >  	key.xmm[1] = *(xmm_t *)data1;
> > -
> > +#endif
> 

The blank line should be re-added below the #ifdef. Apart from that the fix
looks correct to me.

Reviewed-by: Bruce Richardson <bruce.richardson@intel.com>
Jerin Jacob Kollanukkaran July 30, 2019, 11:03 a.m. UTC | #3 
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Bruce Richardson
> Sent: Tuesday, July 30, 2019 3:17 PM
> To: Thomas Monjalon <thomas@monjalon.net>
> Cc: dev@dpdk.org; stable@dpdk.org; hgovindh
> <hariprasad.govindharajan@intel.com>; Marko Kovacevic
> <marko.kovacevic@intel.com>; Ori Kam <orika@mellanox.com>; Pablo de Lara
> <pablo.de.lara.guarch@intel.com>; Radu Nicolau <radu.nicolau@intel.com>;
> Akhil Goyal <akhil.goyal@nxp.com>; Tomasz Kantecki
> <tomasz.kantecki@intel.com>; drc@linux.vnet.ibm.com;
> ruifeng.wang@arm.com; maciej.czekaj@caviumnetworks.com
> Subject: Re: [dpdk-dev] [dpdk-stable] [PATCH v4] examples/l3fwd: fix unaligned
> memory access
> 
> On Tue, Jul 30, 2019 at 10:50:14AM +0200, Thomas Monjalon wrote:
> > Review please?
> >
> > 26/07/2019 15:58, hgovindh:
> > > Fix unaligned memory access when reading IPv6 header which leads to
> > > segmentation fault by changing aligned memory read to unaligned
> > > memory read.
> > >
> > > Bugzilla ID: 279
> > > Fixes: 64d3955de1de ("examples/l3fwd: fix ARM build")
> > > Cc: maciej.czekaj@caviumnetworks.com
> > > Cc: stable@dpdk.org
> > > Signed-off-by: hgovindh <hariprasad.govindharajan@intel.com>
> > > --- a/examples/l3fwd/l3fwd_em.c
> > > +++ b/examples/l3fwd/l3fwd_em.c
> > > +#if defined RTE_ARCH_X86
> > > +	key.xmm[1] = _mm_loadu_si128(data1); #else
> > >  	key.xmm[1] = *(xmm_t *)data1;
> > > -
> > > +#endif
> >
> 
> The blank line should be re-added below the #ifdef. Apart from that the fix looks
> correct to me.
> 
> Reviewed-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
David Christensen July 30, 2019, 5:45 p.m. UTC | #4 
>> On Tue, Jul 30, 2019 at 10:50:14AM +0200, Thomas Monjalon wrote:
>>> Review please?
>>>
>>> 26/07/2019 15:58, hgovindh:
>>>> Fix unaligned memory access when reading IPv6 header which leads to
>>>> segmentation fault by changing aligned memory read to unaligned
>>>> memory read.
>>>>
>>>> Bugzilla ID: 279
>>>> Fixes: 64d3955de1de ("examples/l3fwd: fix ARM build")
>>>> Cc: maciej.czekaj@caviumnetworks.com
>>>> Cc: stable@dpdk.org
>>>> Signed-off-by: hgovindh <hariprasad.govindharajan@intel.com>
>>>> --- a/examples/l3fwd/l3fwd_em.c
>>>> +++ b/examples/l3fwd/l3fwd_em.c
>>>> +#if defined RTE_ARCH_X86
>>>> +	key.xmm[1] = _mm_loadu_si128(data1); #else
>>>>   	key.xmm[1] = *(xmm_t *)data1;
>>>> -
>>>> +#endif
>>>
>>
>> The blank line should be re-added below the #ifdef. Apart from that the fix looks
>> correct to me.
>>
>> Reviewed-by: Bruce Richardson <bruce.richardson@intel.com>
> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Reviewed-by: David Christensen <drc@linux.vnet.ibm.com>
Ruifeng Wang July 31, 2019, 1:27 a.m. UTC | #5 
> -----Original Message-----
> From: David Christensen <drc@linux.vnet.ibm.com>
> Sent: Wednesday, July 31, 2019 01:45
> To: jerinj@marvell.com; Bruce Richardson <bruce.richardson@intel.com>;
> thomas@monjalon.net
> Cc: dev@dpdk.org; stable@dpdk.org; hgovindh
> <hariprasad.govindharajan@intel.com>; Marko Kovacevic
> <marko.kovacevic@intel.com>; Ori Kam <orika@mellanox.com>; Pablo de
> Lara <pablo.de.lara.guarch@intel.com>; Radu Nicolau
> <radu.nicolau@intel.com>; Akhil.goyal@nxp.com; Tomasz Kantecki
> <tomasz.kantecki@intel.com>; Ruifeng Wang (Arm Technology China)
> <Ruifeng.Wang@arm.com>; maciej.czekaj@caviumnetworks.com
> Subject: Re: [dpdk-dev] [dpdk-stable] [PATCH v4] examples/l3fwd: fix
> unaligned memory access
> 
> >> On Tue, Jul 30, 2019 at 10:50:14AM +0200, Thomas Monjalon wrote:
> >>> Review please?
> >>>
> >>> 26/07/2019 15:58, hgovindh:
> >>>> Fix unaligned memory access when reading IPv6 header which leads to
> >>>> segmentation fault by changing aligned memory read to unaligned
> >>>> memory read.
> >>>>
> >>>> Bugzilla ID: 279
> >>>> Fixes: 64d3955de1de ("examples/l3fwd: fix ARM build")
> >>>> Cc: maciej.czekaj@caviumnetworks.com
> >>>> Cc: stable@dpdk.org
> >>>> Signed-off-by: hgovindh <hariprasad.govindharajan@intel.com>
> >>>> --- a/examples/l3fwd/l3fwd_em.c
> >>>> +++ b/examples/l3fwd/l3fwd_em.c
> >>>> +#if defined RTE_ARCH_X86
> >>>> +	key.xmm[1] = _mm_loadu_si128(data1); #else
> >>>>   	key.xmm[1] = *(xmm_t *)data1;
> >>>> -
> >>>> +#endif
> >>>
> >>
> >> The blank line should be re-added below the #ifdef. Apart from that
> >> the fix looks correct to me.
> >>
> >> Reviewed-by: Bruce Richardson <bruce.richardson@intel.com>
> > Reviewed-by: Jerin Jacob <jerinj@marvell.com>
> Reviewed-by: David Christensen <drc@linux.vnet.ibm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
diff mbox series

Patch

diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c
index 5f499e005..ad6fe76e8 100644
--- a/examples/l3fwd/l3fwd_em.c
+++ b/examples/l3fwd/l3fwd_em.c
@@ -287,8 +287,11 @@  em_get_ipv6_dst_port(void *ipv6_hdr, uint16_t portid, void *lookup_struct)
 	 * Get part of 5 tuple: dst IP address lower 96 bits
 	 * and src IP address higher 32 bits.
 	 */
+#if defined RTE_ARCH_X86
+	key.xmm[1] = _mm_loadu_si128(data1);
+#else
 	key.xmm[1] = *(xmm_t *)data1;
-
+#endif
 	/*
 	 * Get part of 5 tuple: dst port and src port
 	 * and dst IP address higher 32 bits.