diff mbox series

[v2] net/mlx5: fix limit on direct rules tables number

Message ID dfd655fdf1c72229ab777db735dce3ef7b039b1f.1564665506.git.dekelp@mellanox.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series [v2] net/mlx5: fix limit on direct rules tables number |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/iol-Compile-Testing success Compile Testing PASS
ci/intel-Performance-Testing success Performance Testing PASS
ci/Intel-compilation success Compilation OK
ci/mellanox-Performance-Testing success Performance Testing PASS

Commit Message

Dekel Peled Aug. 1, 2019, 1:22 p.m. UTC 
  MLX5 PMD limits the number of SW steering tables to 32.
This patch updates the limit to 65535, to allow wide range of values.

Fixes: e2b4925ef7c1 ("net/mlx5: support Direct Rules E-Switch")

v2: remove Cc to stable release, not relevant for this fix.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
---
 drivers/net/mlx5/mlx5.h         | 4 ++--
 drivers/net/mlx5/mlx5_flow_dv.c | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

Comments

Slava Ovsiienko Aug. 4, 2019, 5:43 a.m. UTC | #1 
> -----Original Message-----
> From: Dekel Peled <dekelp@mellanox.com>
> Sent: Thursday, August 1, 2019 16:23
> To: Yongseok Koh <yskoh@mellanox.com>; Slava Ovsiienko
> <viacheslavo@mellanox.com>; Shahaf Shuler <shahafs@mellanox.com>
> Cc: Ori Kam <orika@mellanox.com>; dev@dpdk.org
> Subject: [PATCH v2] net/mlx5: fix limit on direct rules tables number
> 
> MLX5 PMD limits the number of SW steering tables to 32.
> This patch updates the limit to 65535, to allow wide range of values.
> 
> Fixes: e2b4925ef7c1 ("net/mlx5: support Direct Rules E-Switch")
> 
> v2: remove Cc to stable release, not relevant for this fix.
> 
> Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>

> ---
>  drivers/net/mlx5/mlx5.h         | 4 ++--
>  drivers/net/mlx5/mlx5_flow_dv.c | 2 +-
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index
> caf2491..f559f83 100644
> --- a/drivers/net/mlx5/mlx5.h
> +++ b/drivers/net/mlx5/mlx5.h
> @@ -513,8 +513,8 @@ struct mlx5_flow_tbl_resource {
>  	rte_atomic32_t refcnt; /**< Reference counter. */  };
> 
> -#define MLX5_MAX_TABLES 1024
> -#define MLX5_MAX_TABLES_FDB 32
> +#define MLX5_MAX_TABLES 0xffff
> +#define MLX5_MAX_TABLES_FDB 0xffff
>  #define MLX5_GROUP_FACTOR 1
> 
>  #define MLX5_DBR_PAGE_SIZE 4096 /* Must be >= 512. */ diff --git
> a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
> index 9c0a261..14e70ed 100644
> --- a/drivers/net/mlx5/mlx5_flow_dv.c
> +++ b/drivers/net/mlx5/mlx5_flow_dv.c
> @@ -2817,7 +2817,7 @@ struct field_modify_info modify_tcp[] = {
>  				(error, EINVAL,
>  				 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
>  				 NULL, "group must be smaller than "
> -				 RTE_STR(MLX5_MAX_FDB_TABLES));
> +				 RTE_STR(MLX5_MAX_TABLES_FDB));
>  	}
>  	if (!(attributes->egress ^ attributes->ingress))
>  		return rte_flow_error_set(error, ENOTSUP,
> --
> 1.8.3.1
Raslan Darawsheh Aug. 4, 2019, 10:29 a.m. UTC | #2 
Hi,

> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Dekel Peled
> Sent: Thursday, August 1, 2019 4:23 PM
> To: Yongseok Koh <yskoh@mellanox.com>; Slava Ovsiienko
> <viacheslavo@mellanox.com>; Shahaf Shuler <shahafs@mellanox.com>
> Cc: Ori Kam <orika@mellanox.com>; dev@dpdk.org
> Subject: [dpdk-dev] [PATCH v2] net/mlx5: fix limit on direct rules tables
> number
> 
> MLX5 PMD limits the number of SW steering tables to 32.
> This patch updates the limit to 65535, to allow wide range of values.
> 
> Fixes: e2b4925ef7c1 ("net/mlx5: support Direct Rules E-Switch")
> 
> v2: remove Cc to stable release, not relevant for this fix.
> 
> Signed-off-by: Dekel Peled <dekelp@mellanox.com>
> ---
>  drivers/net/mlx5/mlx5.h         | 4 ++--
>  drivers/net/mlx5/mlx5_flow_dv.c | 2 +-
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
> index caf2491..f559f83 100644
> --- a/drivers/net/mlx5/mlx5.h
> +++ b/drivers/net/mlx5/mlx5.h
> @@ -513,8 +513,8 @@ struct mlx5_flow_tbl_resource {
>  	rte_atomic32_t refcnt; /**< Reference counter. */
>  };
> 
> -#define MLX5_MAX_TABLES 1024
> -#define MLX5_MAX_TABLES_FDB 32
> +#define MLX5_MAX_TABLES 0xffff
> +#define MLX5_MAX_TABLES_FDB 0xffff
>  #define MLX5_GROUP_FACTOR 1
> 
>  #define MLX5_DBR_PAGE_SIZE 4096 /* Must be >= 512. */
> diff --git a/drivers/net/mlx5/mlx5_flow_dv.c
> b/drivers/net/mlx5/mlx5_flow_dv.c
> index 9c0a261..14e70ed 100644
> --- a/drivers/net/mlx5/mlx5_flow_dv.c
> +++ b/drivers/net/mlx5/mlx5_flow_dv.c
> @@ -2817,7 +2817,7 @@ struct field_modify_info modify_tcp[] = {
>  				(error, EINVAL,
>  				 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
>  				 NULL, "group must be smaller than "
> -				 RTE_STR(MLX5_MAX_FDB_TABLES));
> +				 RTE_STR(MLX5_MAX_TABLES_FDB));
>  	}
>  	if (!(attributes->egress ^ attributes->ingress))
>  		return rte_flow_error_set(error, ENOTSUP,
> --
> 1.8.3.1


Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index caf2491..f559f83 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -513,8 +513,8 @@  struct mlx5_flow_tbl_resource {
 	rte_atomic32_t refcnt; /**< Reference counter. */
 };
 
-#define MLX5_MAX_TABLES 1024
-#define MLX5_MAX_TABLES_FDB 32
+#define MLX5_MAX_TABLES 0xffff
+#define MLX5_MAX_TABLES_FDB 0xffff
 #define MLX5_GROUP_FACTOR 1
 
 #define MLX5_DBR_PAGE_SIZE 4096 /* Must be >= 512. */
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 9c0a261..14e70ed 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -2817,7 +2817,7 @@  struct field_modify_info modify_tcp[] = {
 				(error, EINVAL,
 				 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
 				 NULL, "group must be smaller than "
-				 RTE_STR(MLX5_MAX_FDB_TABLES));
+				 RTE_STR(MLX5_MAX_TABLES_FDB));
 	}
 	if (!(attributes->egress ^ attributes->ingress))
 		return rte_flow_error_set(error, ENOTSUP,