diff mbox series

net/mlx5: fix packet size inline settings

Message ID 1564926963-31523-1-git-send-email-viacheslavo@mellanox.com (mailing list archive)
State Changes Requested, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5: fix packet size inline settings |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Slava Ovsiienko Aug. 4, 2019, 1:56 p.m. UTC 
  This patch fixes the default settings for packet size to inline
with Enhanced Multi-Packet Write feature, allowing 256B packets
to be inlined with Out-Of-the-Box settings.

Fixes: 50724e1bba76 ("net/mlx5: update Tx definitions")

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
---
 doc/guides/nics/mlx5.rst    | 2 +-
 drivers/net/mlx5/mlx5_prm.h | 5 ++---
 2 files changed, 3 insertions(+), 4 deletions(-)

Comments

Matan Azrad Aug. 5, 2019, 6:40 a.m. UTC | #1 
From:  Viacheslav Ovsiienko
> This patch fixes the default settings for packet size to inline with Enhanced
> Multi-Packet Write feature, allowing 256B packets to be inlined with Out-Of-
> the-Box settings.
> 
> Fixes: 50724e1bba76 ("net/mlx5: update Tx definitions")
> 
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
diff mbox series

Patch

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 46538b8..5102bcd 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -449,7 +449,7 @@  Run-time configuration
   and CPU resources are scarce), data inline is not performed by the driver.
   Assigning ``txqs_min_inline`` with zero always enables the data inline.
 
-  The default ``txq_inline_mpw`` value is 188. The specified value may be adjusted
+  The default ``txq_inline_mpw`` value is 268. The specified value may be adjusted
   by the driver in order not to exceed the limit (930 bytes) and to provide better
   WQE space filling without gaps, the adjustment is reflected in the debug log.
   Due to multiple packets may be included to the same WQE with Enhanced Multi
diff --git a/drivers/net/mlx5/mlx5_prm.h b/drivers/net/mlx5/mlx5_prm.h
index 4ee6d89..d62837e 100644
--- a/drivers/net/mlx5/mlx5_prm.h
+++ b/drivers/net/mlx5/mlx5_prm.h
@@ -72,9 +72,8 @@ 
  * boundary with accounting the title Control and Ethernet
  * segments.
  */
-#define MLX5_EMPW_DEF_INLINE_LEN (3u * MLX5_WQE_SIZE + \
-				  MLX5_DSEG_MIN_INLINE_SIZE - \
-				  MLX5_WQE_DSEG_SIZE)
+#define MLX5_EMPW_DEF_INLINE_LEN (4u * MLX5_WQE_SIZE + \
+				  MLX5_DSEG_MIN_INLINE_SIZE)
 /*
  * Maximal inline data length sent with enhanced MPW.
  * Is based on maximal WQE size.