[1/2] net/mlx5: fix Rx CQ doorbell synchronization on aarch64

Message ID 1567680908-31210-1-git-send-email-phil.yang@arm.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series [1/2] net/mlx5: fix Rx CQ doorbell synchronization on aarch64 |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/iol-dpdk_compile success Compile Testing PASS
ci/iol-dpdk_compile_ovs success Compile Testing PASS
ci/iol-dpdk_compile_spdk success Compile Testing PASS
ci/intel-Performance success Performance Testing PASS
ci/mellanox-Performance success Performance Testing PASS

Commit Message

Phil Yang Sept. 5, 2019, 10:55 a.m. UTC
  The Rx completion queue doorbell field needs to be updated after
the last CQE decompressed. For the weaker memory model processors,
the compiler barrier is not sufficient to guarantee the order of
these operations, so use the coherent I/O memory barrier to make
sure these fields are updated in order.

Fixes: 570acdb1da8a ("net/mlx5: add vectorized Rx/Tx burst for ARM")
Cc: stable@dpdk.org

Suggested-by: Gavin Hu <gavin.hu@arm.com>
Signed-off-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
---
 drivers/net/mlx5/mlx5_rxtx_vec_neon.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
  

Comments

Matan Azrad Sept. 10, 2019, 7:22 a.m. UTC | #1
From: Phil Yang 
> Subject: [PATCH 1/2] net/mlx5: fix Rx CQ doorbell synchronization on aarch64
> 
> The Rx completion queue doorbell field needs to be updated after the last
> CQE decompressed. For the weaker memory model processors, the compiler
> barrier is not sufficient to guarantee the order of these operations, so use
> the coherent I/O memory barrier to make sure these fields are updated in
> order.
> 
> Fixes: 570acdb1da8a ("net/mlx5: add vectorized Rx/Tx burst for ARM")
> Cc: stable@dpdk.org
> 
> Suggested-by: Gavin Hu <gavin.hu@arm.com>
> Signed-off-by: Phil Yang <phil.yang@arm.com>
> Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Acked-by: Matan Azrad <matan@mellanox.com>
  
Raslan Darawsheh Sept. 12, 2019, 8:29 a.m. UTC | #2
Hi,

> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Phil Yang
> Sent: Thursday, September 5, 2019 1:55 PM
> To: Yongseok Koh <yskoh@mellanox.com>; Slava Ovsiienko
> <viacheslavo@mellanox.com>; Matan Azrad <matan@mellanox.com>; Nélio
> Laranjeiro <nelio.laranjeiro@6wind.com>; dev@dpdk.org
> Cc: Thomas Monjalon <thomas@monjalon.net>; jerinj@marvell.com;
> Honnappa.Nagarahalli@arm.com; gavin.hu@arm.com; nd@arm.com;
> stable@dpdk.org
> Subject: [dpdk-dev] [PATCH 1/2] net/mlx5: fix Rx CQ doorbell
> synchronization on aarch64
> 
> The Rx completion queue doorbell field needs to be updated after
> the last CQE decompressed. For the weaker memory model processors,
> the compiler barrier is not sufficient to guarantee the order of
> these operations, so use the coherent I/O memory barrier to make
> sure these fields are updated in order.
> 
> Fixes: 570acdb1da8a ("net/mlx5: add vectorized Rx/Tx burst for ARM")
> Cc: stable@dpdk.org
> 
> Suggested-by: Gavin Hu <gavin.hu@arm.com>
> Signed-off-by: Phil Yang <phil.yang@arm.com>
> Reviewed-by: Gavin Hu <gavin.hu@arm.com>
> ---


Patch applied to next-net-mlx, 

Kindest regards,
Raslan Darawsheh
  

Patch

diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
index 9930286..e914d01 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
@@ -727,7 +727,7 @@  rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n,
 			rxq->decompressed -= n;
 		}
 	}
-	rte_compiler_barrier();
+	rte_cio_wmb();
 	*rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
 	return rcvd_pkt;
 }