diff mbox series

net/i40e: fix conflict with multi-driver

Message ID 20190920105722.48921-1-alvinx.zhang@intel.com (mailing list archive)
State Superseded, archived
Delegated to: xiaolong ye
Headers
Series net/i40e: fix conflict with multi-driver |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/iol-dpdk_compile_ovs success Compile Testing PASS
ci/iol-dpdk_compile success Compile Testing PASS
ci/iol-dpdk_compile_spdk success Compile Testing PASS
ci/intel-Performance success Performance Testing PASS
ci/mellanox-Performance success Performance Testing PASS

Commit Message

Alvin Zhang Sept. 20, 2019, 10:57 a.m. UTC 
  From: Alvin Zhang <alvinx.zhang@intel.com>

If support-multi-driver option been set, we suppose the DPDK will
not modify the value of global register GLQF_FD_MSK. Current
situation is if we create a new flow with 'flow creat ...' command,
the register value may be changed.

Fixes: cfdfca493cae ("net/i40e: fix multiple driver support")
Cc: stable@dpdk.org

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
---
 drivers/net/i40e/i40e_flow.c | 34 +++++++++++++++++++++++++++-------
 1 file changed, 27 insertions(+), 7 deletions(-)

Comments

Xing, Beilei Sept. 25, 2019, 9:16 a.m. UTC | #1 
> -----Original Message-----
> From: Zhang, AlvinX
> Sent: Friday, September 20, 2019 6:57 PM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>; Xing, Beilei <beilei.xing@intel.com>
> Cc: dev@dpdk.org; Zhang, AlvinX <alvinx.zhang@intel.com>;
> stable@dpdk.org
> Subject: [PATCH] net/i40e: fix conflict with multi-driver
> 
> From: Alvin Zhang <alvinx.zhang@intel.com>
> 
> If support-multi-driver option been set, we suppose the DPDK will not modify
> the value of global register GLQF_FD_MSK. Current situation is if we create a
> new flow with 'flow creat ...' command, the register value may be changed.

Thanks for the fix, the patch looks OK for me, but the commit log should be amended.
How about 
"If support-multi-driver is enabled, the global registers should not be configured.
But with the correct code base, if creating a flow with rte_flow API, the global
register GLQF_FD_MSK may be changed." ?

Beilei

> 
> Fixes: cfdfca493cae ("net/i40e: fix multiple driver support")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
> ---
>  drivers/net/i40e/i40e_flow.c | 34 +++++++++++++++++++++++++++-------
>  1 file changed, 27 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
> index e902a35..8c54394 100644
> --- a/drivers/net/i40e/i40e_flow.c
> +++ b/drivers/net/i40e/i40e_flow.c
> @@ -2349,6 +2349,33 @@ static int i40e_flow_destroy_tunnel_filter(struct
> i40e_pf *pf,
>  	if (num < 0)
>  		return -EINVAL;
> 
> +	if (pf->support_multi_driver) {
> +		for (i = 0; i < num; i++)
> +			if (i40e_read_rx_ctl(hw,
> +					I40E_GLQF_FD_MSK(i, pctype)) !=
> +					mask_reg[i]) {
> +				PMD_DRV_LOG(ERR, "Input set setting is not"
> +						" supported.");
> +				return -1;
> +			}
> +		for (i = num; i < I40E_INSET_MASK_NUM_REG; i++)
> +			if (i40e_read_rx_ctl(hw,
> +					I40E_GLQF_FD_MSK(i, pctype)) != 0) {
> +				PMD_DRV_LOG(ERR, "Input set setting is not"
> +						" supported.");
> +				return -1;
> +			}
> +
> +	} else {
> +		for (i = 0; i < num; i++)
> +			i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype),
> +				mask_reg[i]);
> +		/*clear unused mask registers of the pctype */
> +		for (i = num; i < I40E_INSET_MASK_NUM_REG; i++)
> +			i40e_check_write_reg(hw,
> +					I40E_GLQF_FD_MSK(i, pctype), 0);
> +	}
> +
>  	inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set);
> 
>  	i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0), @@
> -2357,13 +2384,6 @@ static int i40e_flow_destroy_tunnel_filter(struct
> i40e_pf *pf,
>  			     (uint32_t)((inset_reg >>
>  					 I40E_32_BIT_WIDTH) & UINT32_MAX));
> 
> -	for (i = 0; i < num; i++)
> -		i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype),
> -				     mask_reg[i]);
> -
> -	/*clear unused mask registers of the pctype */
> -	for (i = num; i < I40E_INSET_MASK_NUM_REG; i++)
> -		i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), 0);
>  	I40E_WRITE_FLUSH(hw);
> 
>  	pf->fdir.input_set[pctype] = input_set;
> --
> 1.8.3.1
diff mbox series

Patch

diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
index e902a35..8c54394 100644
--- a/drivers/net/i40e/i40e_flow.c
+++ b/drivers/net/i40e/i40e_flow.c
@@ -2349,6 +2349,33 @@  static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf,
 	if (num < 0)
 		return -EINVAL;
 
+	if (pf->support_multi_driver) {
+		for (i = 0; i < num; i++)
+			if (i40e_read_rx_ctl(hw,
+					I40E_GLQF_FD_MSK(i, pctype)) !=
+					mask_reg[i]) {
+				PMD_DRV_LOG(ERR, "Input set setting is not"
+						" supported.");
+				return -1;
+			}
+		for (i = num; i < I40E_INSET_MASK_NUM_REG; i++)
+			if (i40e_read_rx_ctl(hw,
+					I40E_GLQF_FD_MSK(i, pctype)) != 0) {
+				PMD_DRV_LOG(ERR, "Input set setting is not"
+						" supported.");
+				return -1;
+			}
+
+	} else {
+		for (i = 0; i < num; i++)
+			i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype),
+				mask_reg[i]);
+		/*clear unused mask registers of the pctype */
+		for (i = num; i < I40E_INSET_MASK_NUM_REG; i++)
+			i40e_check_write_reg(hw,
+					I40E_GLQF_FD_MSK(i, pctype), 0);
+	}
+
 	inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set);
 
 	i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0),
@@ -2357,13 +2384,6 @@  static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf,
 			     (uint32_t)((inset_reg >>
 					 I40E_32_BIT_WIDTH) & UINT32_MAX));
 
-	for (i = 0; i < num; i++)
-		i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype),
-				     mask_reg[i]);
-
-	/*clear unused mask registers of the pctype */
-	for (i = num; i < I40E_INSET_MASK_NUM_REG; i++)
-		i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), 0);
 	I40E_WRITE_FLUSH(hw);
 
 	pf->fdir.input_set[pctype] = input_set;