diff mbox series

net/octeontx2: add Rx/Tx burst mode get callbacks

Message ID 1569826761-6772-1-git-send-email-skori@marvell.com (mailing list archive)
State Superseded, archived
Delegated to: Jerin Jacob
Headers
Series net/octeontx2: add Rx/Tx burst mode get callbacks |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation fail Compilation issues
ci/Performance-Testing fail build patch failure

Commit Message

Sunil Kumar Kori Sept. 30, 2019, 6:59 a.m. UTC 
  Retrieve burst mode options according to the selected Rx/Tx burst
function.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---

Below implementation is based on following patchset
http://patches.dpdk.org/patch/59907/

 drivers/net/octeontx2/otx2_ethdev.c     |  2 ++
 drivers/net/octeontx2/otx2_ethdev.h     |  4 +++
 drivers/net/octeontx2/otx2_ethdev_ops.c | 45 +++++++++++++++++++++++++
 3 files changed, 51 insertions(+)

Comments

Jerin Jacob Oct. 15, 2019, 2:26 p.m. UTC | #1 
On Mon, Sep 30, 2019 at 12:29 PM Sunil Kumar Kori <skori@marvell.com> wrote:
>
> Retrieve burst mode options according to the selected Rx/Tx burst
> function.
>
> Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
> ---
>
> Below implementation is based on following patchset
> http://patches.dpdk.org/patch/59907/

Depend patch got merged into next-net tree.
Please rebase this patch add update the feature matrix.
See https://git.dpdk.org/next/dpdk-next-net/commit/?id=846452547945b112d71ab2f0be390b4622b81759
"net/i40e: add Rx/Tx burst mode get callbacks" for details for feature
matrix update.
diff mbox series

Patch

diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c
index b84128fef..558ad92f1 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1643,6 +1643,8 @@  static const struct eth_dev_ops otx2_eth_dev_ops = {
 	.xstats_get_names_by_id   = otx2_nix_xstats_get_names_by_id,
 	.rxq_info_get             = otx2_nix_rxq_info_get,
 	.txq_info_get             = otx2_nix_txq_info_get,
+	.rx_burst_mode_get        = otx2_rx_burst_mode_get,
+	.tx_burst_mode_get        = otx2_tx_burst_mode_get,
 	.rx_queue_count           = otx2_nix_rx_queue_count,
 	.rx_descriptor_done       = otx2_nix_rx_descriptor_done,
 	.rx_descriptor_status     = otx2_nix_rx_descriptor_status,
diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h
index 7b15d6bc8..c1de1522b 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -373,6 +373,10 @@  void otx2_nix_rxq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id,
 			   struct rte_eth_rxq_info *qinfo);
 void otx2_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id,
 			   struct rte_eth_txq_info *qinfo);
+int otx2_rx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id,
+			   struct rte_eth_burst_mode *mode);
+int otx2_tx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id,
+			   struct rte_eth_burst_mode *mode);
 uint32_t otx2_nix_rx_queue_count(struct rte_eth_dev *eth_dev, uint16_t qidx);
 int otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt);
 int otx2_nix_rx_descriptor_done(void *rxq, uint16_t offset);
diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c b/drivers/net/octeontx2/otx2_ethdev_ops.c
index 7c6532b6f..530ded7fe 100644
--- a/drivers/net/octeontx2/otx2_ethdev_ops.c
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -2,6 +2,7 @@ 
  * Copyright(C) 2019 Marvell International Ltd.
  */
 
+#include <rte_ethdev.h>
 #include <rte_mbuf_pool_ops.h>
 
 #include "otx2_ethdev.h"
@@ -213,6 +214,50 @@  otx2_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id,
 	qinfo->conf.tx_deferred_start = 0;
 }
 
+int
+otx2_rx_burst_mode_get(struct rte_eth_dev *eth_dev,
+		       __rte_unused uint16_t queue_id,
+		       struct rte_eth_burst_mode *mode)
+{
+	struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+	uint64_t options;
+
+	if (dev->scalar_ena || dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
+		options = RTE_ETH_BURST_SCALAR;
+	else
+		options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_NEON;
+
+	if (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)
+		options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_SCATTERED;
+
+	mode->options = options;
+
+	return 0;
+}
+
+int
+otx2_tx_burst_mode_get(struct rte_eth_dev *eth_dev,
+		       __rte_unused uint16_t queue_id,
+		       struct rte_eth_burst_mode *mode)
+{
+	struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+	uint64_t options;
+
+	if (dev->scalar_ena ||
+		(dev->tx_offload_flags &
+		 (NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_TSTAMP_F)))
+		options = RTE_ETH_BURST_SCALAR;
+	else
+		options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_NEON;
+
+	if (dev->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
+		options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_SCATTERED;
+
+	mode->options = options;
+
+	return 0;
+}
+
 static void
 nix_rx_head_tail_get(struct otx2_eth_dev *dev,
 		     uint32_t *head, uint32_t *tail, uint16_t queue_idx)