doc: add missing info regard Geneve matching

Message ID 1571658394-5059-1-git-send-email-rasland@mellanox.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series doc: add missing info regard Geneve matching |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/travis-robot success Travis build: passed

Commit Message

Raslan Darawsheh Oct. 21, 2019, 11:46 a.m. UTC
  Fixes: 398b0cdcd ("net/mlx5: add flow match on GENEVE item")

Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
---
 doc/guides/nics/mlx5.rst | 4 ++++
 1 file changed, 4 insertions(+)
  

Comments

Ferruh Yigit Oct. 21, 2019, 3:43 p.m. UTC | #1
On 10/21/2019 12:46 PM, Raslan Darawsheh wrote:
> Fixes: 398b0cdcd ("net/mlx5: add flow match on GENEVE item")
> 
> Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>

Squashed into relevant commit in next-net, thanks.
  

Patch

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 08039bc..fc7de52 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -690,6 +690,10 @@  Below are some firmware configurations listed.
 
     FLEX_PARSER_PROFILE_ENABLE=2
 
+- enable Geneve flow matching::
+
+   FLEX_PARSER_PROFILE_ENABLE=0
+
 Prerequisites
 -------------