diff mbox series

net/octeontx2: fix compilation with x86_x32

Message ID 20191030183143.905-1-pbhagavatula@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers
Series net/octeontx2: fix compilation with x86_x32 |

Checks

Context Check Description
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-compilation success Compile Testing PASS
ci/Intel-compilation fail Compilation issues
ci/iol-mellanox-Performance success Performance Testing PASS
ci/travis-robot success Travis build: passed
ci/checkpatch warning coding style issues

Commit Message

Pavan Nikhilesh Bhagavatula Oct. 30, 2019, 6:31 p.m. UTC 
  From: Pavan Nikhilesh <pbhagavatula@marvell.com>

x86_x32 compilation failing due to incorrect format specifiers in logs.

Fixes: a78b9246723b ("net/octeontx2: add remaining PTP operations")

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
 drivers/net/octeontx2/otx2_ptp.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

--
2.20.1

Comments

Gavin Hu Nov. 6, 2019, 12:43 a.m. UTC | #1 
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Jerin Jacob Nov. 6, 2019, 6:41 a.m. UTC | #2 
On Wed, Nov 6, 2019 at 6:13 AM Gavin Hu (Arm Technology China)
<Gavin.Hu@arm.com> wrote:
>
> Reviewed-by: Gavin Hu <gavin.hu@arm.com>

Applied to dpdk-next-net-mrvl/master. Thanks
diff mbox series

Patch

diff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c
index fd13c2678..7efdbba1f 100644
--- a/drivers/net/octeontx2/otx2_ptp.c
+++ b/drivers/net/octeontx2/otx2_ptp.c
@@ -259,9 +259,9 @@  otx2_nix_timesync_read_rx_timestamp(struct rte_eth_dev *eth_dev,
 	*timestamp = rte_ns_to_timespec(ns);
 	tstamp->rx_ready = 0;

-	otx2_nix_dbg("rx timestamp: %llu sec: %lu nsec %lu",
-		     (unsigned long long)tstamp->rx_tstamp, timestamp->tv_sec,
-		     timestamp->tv_nsec);
+	otx2_nix_dbg("rx timestamp: %"PRIu64" sec: %"PRIu64" nsec %"PRIu64"",
+		     (uint64_t)tstamp->rx_tstamp, (uint64_t)timestamp->tv_sec,
+		     (uint64_t)timestamp->tv_nsec);

 	return 0;
 }
@@ -280,9 +280,9 @@  otx2_nix_timesync_read_tx_timestamp(struct rte_eth_dev *eth_dev,
 	ns = rte_timecounter_update(&dev->tx_tstamp_tc, *tstamp->tx_tstamp);
 	*timestamp = rte_ns_to_timespec(ns);

-	otx2_nix_dbg("tx timestamp: %llu sec: %lu nsec %lu",
-		     *(unsigned long long *)tstamp->tx_tstamp,
-		     timestamp->tv_sec, timestamp->tv_nsec);
+	otx2_nix_dbg("tx timestamp: %"PRIu64" sec: %"PRIu64" nsec %"PRIu64"",
+		     *tstamp->tx_tstamp, (uint64_t)timestamp->tv_sec,
+		     (uint64_t)timestamp->tv_nsec);

 	*tstamp->tx_tstamp = 0;
 	rte_wmb();
@@ -358,7 +358,8 @@  otx2_nix_timesync_read_time(struct rte_eth_dev *eth_dev, struct timespec *ts)
 	ns = rte_timecounter_update(&dev->systime_tc, rsp->clk);
 	*ts = rte_ns_to_timespec(ns);

-	otx2_nix_dbg("PTP time read: %ld.%09ld", ts->tv_sec, ts->tv_nsec);
+	otx2_nix_dbg("PTP time read: %"PRIu64" .%09"PRIu64"",
+		     (uint64_t)ts->tv_sec, (uint64_t)ts->tv_nsec);

 	return 0;
 }