crypto/qat: fix not included release note for coalescing feature

Message ID 20200131072848.6748-2-arkadiuszx.kusztal@intel.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series crypto/qat: fix not included release note for coalescing feature |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/travis-robot success Travis build: passed
ci/Intel-compilation success Compilation OK

Commit Message

Arkadiusz Kusztal Jan. 31, 2020, 7:28 a.m. UTC
  This patch fixes not included in original patch release note

Fixes: 6cde900bd59d ("common/qat: remove tail write coalescing")

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
---
 doc/guides/rel_notes/release_20_02.rst | 9 +++++++++
 1 file changed, 9 insertions(+)
  

Comments

Fiona Trahe Feb. 10, 2020, 10:17 a.m. UTC | #1
> -----Original Message-----
> From: Kusztal, ArkadiuszX <arkadiuszx.kusztal@intel.com>
> Sent: Friday, January 31, 2020 7:29 AM
> To: dev@dpdk.org
> Cc: akhil.goyal@nxp.com; Trahe, Fiona <fiona.trahe@intel.com>; Kusztal, ArkadiuszX
> <arkadiuszx.kusztal@intel.com>
> Subject: [PATCH] crypto/qat: fix not included release note for coalescing feature
> 
> This patch fixes not included in original patch release note
> 
> Fixes: 6cde900bd59d ("common/qat: remove tail write coalescing")
> 
> Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
  

Patch

diff --git a/doc/guides/rel_notes/release_20_02.rst b/doc/guides/rel_notes/release_20_02.rst
index d19a7f5..661969c 100644
--- a/doc/guides/rel_notes/release_20_02.rst
+++ b/doc/guides/rel_notes/release_20_02.rst
@@ -184,6 +184,15 @@  Removed Items
   the Technical Board decided to disable all the kernel modules
   by default from 20.02 version.
 
+* **Removed coalescing feature from Intel QuickAssist Technology (QAT) PMD.**
+
+  The internal tail write coalescing feature was removed as not compatible with
+  dual-thread feature. It was replaced with a threshold feature. At busy times
+  if only a small	number of packets can be enqueued, each enqueue causes
+  an expensive MMIO write. These MMIO write occurrences can be optimised by using
+  the new threshold parameter	on process start. Please see qat documentation for
+  more details.
+
 
 API Changes
 -----------