[v3,4/8] net/dpaa2: add default Rx params in devinfo
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Commit Message
This patch adds default/preferred rx/tx params in dev info,
specially the advertised burst size.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa/dpaa_ethdev.c | 4 ++++
drivers/net/dpaa/dpaa_ethdev.h | 1 +
drivers/net/dpaa2/dpaa2_ethdev.c | 16 ++++++++++++++++
drivers/net/dpaa2/dpaa2_ethdev.h | 2 ++
4 files changed, 23 insertions(+)
Comments
On 5/4/2020 1:41 PM, Hemant Agrawal wrote:
> This patch adds default/preferred rx/tx params in dev info,
> specially the advertised burst size.
>
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> ---
> drivers/net/dpaa/dpaa_ethdev.c | 4 ++++
> drivers/net/dpaa/dpaa_ethdev.h | 1 +
> drivers/net/dpaa2/dpaa2_ethdev.c | 16 ++++++++++++++++
> drivers/net/dpaa2/dpaa2_ethdev.h | 2 ++
> 4 files changed, 23 insertions(+)
>
> diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
> index 5f81968d80..56eb5ec47c 100644
> --- a/drivers/net/dpaa/dpaa_ethdev.c
> +++ b/drivers/net/dpaa/dpaa_ethdev.c
> @@ -363,6 +363,10 @@ static int dpaa_eth_dev_info(struct rte_eth_dev *dev,
> dev_tx_offloads_nodis;
> dev_info->default_rxportconf.burst_size = DPAA_DEF_RX_BURST_SIZE;
> dev_info->default_txportconf.burst_size = DPAA_DEF_TX_BURST_SIZE;
> + dev_info->default_rxportconf.nb_queues = 1;
> + dev_info->default_txportconf.nb_queues = 1;
> + dev_info->default_txportconf.ring_size = CGR_TX_CGR_THRESH;
> + dev_info->default_rxportconf.ring_size = CGR_RX_PERFQ_THRESH;
>
> return 0;
> }
> diff --git a/drivers/net/dpaa/dpaa_ethdev.h b/drivers/net/dpaa/dpaa_ethdev.h
> index da06f1faa1..af9fc2105d 100644
> --- a/drivers/net/dpaa/dpaa_ethdev.h
> +++ b/drivers/net/dpaa/dpaa_ethdev.h
> @@ -42,6 +42,7 @@
>
> /* RX queue tail drop threshold (CGR Based) in frame count */
> #define CGR_RX_PERFQ_THRESH 256
> +#define CGR_TX_CGR_THRESH 512
>
> /*max mac filter for memac(8) including primary mac addr*/
> #define DPAA_MAX_MAC_FILTER (MEMAC_NUM_OF_PADDRS + 1)
> diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
> index 4fc550a885..b70a2ac01c 100644
> --- a/drivers/net/dpaa2/dpaa2_ethdev.c
> +++ b/drivers/net/dpaa2/dpaa2_ethdev.c
> @@ -275,6 +275,22 @@ dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
> dev_info->max_vmdq_pools = ETH_16_POOLS;
> dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL;
>
> + dev_info->default_rxportconf.burst_size = dpaa2_dqrr_size;
> + /* same is rx size for best perf */
> + dev_info->default_txportconf.burst_size = dpaa2_dqrr_size;
> +
> + dev_info->default_rxportconf.nb_queues = 1;
> + dev_info->default_txportconf.nb_queues = 1;
> + dev_info->default_txportconf.ring_size = CONG_ENTER_TX_THRESHOLD;
> + dev_info->default_rxportconf.ring_size = DPAA2_RX_DEFAULT_NBDESC;
> +
> + if (dpaa2_svr_family == SVR_LX2160A) {
> + dev_info->speed_capa |= ETH_LINK_SPEED_25G |
> + ETH_LINK_SPEED_40G |
> + ETH_LINK_SPEED_50G |
> + ETH_LINK_SPEED_100G;
> + }
'speed_capa' is not default param, but anyway the "Speed capabilities" feature
of the PMD seems marked as 'P', does it change with this update? What is missing
for full support?
> +
> return 0;
> }
>
> diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
> index 31dca8c7b6..2c49a7f01f 100644
> --- a/drivers/net/dpaa2/dpaa2_ethdev.h
> +++ b/drivers/net/dpaa2/dpaa2_ethdev.h
> @@ -24,6 +24,8 @@
> #define MAX_TX_QUEUES 16
> #define MAX_DPNI 8
>
> +#define DPAA2_RX_DEFAULT_NBDESC 512
> +
> /*default tc to be used for ,congestion, distribution etc configuration. */
> #define DPAA2_DEF_TC 0
>
>
Hi Ferruh,
> -----Original Message-----
> From: Ferruh Yigit <ferruh.yigit@intel.com>
> Sent: Thursday, May 7, 2020 3:00 AM
> To: Hemant Agrawal <hemant.agrawal@nxp.com>; dev@dpdk.org
> Subject: Re: [PATCH v3 4/8] net/dpaa2: add default Rx params in devinfo
>
> On 5/4/2020 1:41 PM, Hemant Agrawal wrote:
> > This patch adds default/preferred rx/tx params in dev info, specially
> > the advertised burst size.
> >
> > + if (dpaa2_svr_family == SVR_LX2160A) {
> > + dev_info->speed_capa |= ETH_LINK_SPEED_25G |
> > + ETH_LINK_SPEED_40G |
> > + ETH_LINK_SPEED_50G |
> > + ETH_LINK_SPEED_100G;
> > + }
>
> 'speed_capa' is not default param, but anyway the "Speed capabilities"
> feature of the PMD seems marked as 'P', does it change with this update?
> What is missing for full support?
>
[Hemant] I missed to update the docs. I will update the doc to Y now.
@@ -363,6 +363,10 @@ static int dpaa_eth_dev_info(struct rte_eth_dev *dev,
dev_tx_offloads_nodis;
dev_info->default_rxportconf.burst_size = DPAA_DEF_RX_BURST_SIZE;
dev_info->default_txportconf.burst_size = DPAA_DEF_TX_BURST_SIZE;
+ dev_info->default_rxportconf.nb_queues = 1;
+ dev_info->default_txportconf.nb_queues = 1;
+ dev_info->default_txportconf.ring_size = CGR_TX_CGR_THRESH;
+ dev_info->default_rxportconf.ring_size = CGR_RX_PERFQ_THRESH;
return 0;
}
@@ -42,6 +42,7 @@
/* RX queue tail drop threshold (CGR Based) in frame count */
#define CGR_RX_PERFQ_THRESH 256
+#define CGR_TX_CGR_THRESH 512
/*max mac filter for memac(8) including primary mac addr*/
#define DPAA_MAX_MAC_FILTER (MEMAC_NUM_OF_PADDRS + 1)
@@ -275,6 +275,22 @@ dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
dev_info->max_vmdq_pools = ETH_16_POOLS;
dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL;
+ dev_info->default_rxportconf.burst_size = dpaa2_dqrr_size;
+ /* same is rx size for best perf */
+ dev_info->default_txportconf.burst_size = dpaa2_dqrr_size;
+
+ dev_info->default_rxportconf.nb_queues = 1;
+ dev_info->default_txportconf.nb_queues = 1;
+ dev_info->default_txportconf.ring_size = CONG_ENTER_TX_THRESHOLD;
+ dev_info->default_rxportconf.ring_size = DPAA2_RX_DEFAULT_NBDESC;
+
+ if (dpaa2_svr_family == SVR_LX2160A) {
+ dev_info->speed_capa |= ETH_LINK_SPEED_25G |
+ ETH_LINK_SPEED_40G |
+ ETH_LINK_SPEED_50G |
+ ETH_LINK_SPEED_100G;
+ }
+
return 0;
}
@@ -24,6 +24,8 @@
#define MAX_TX_QUEUES 16
#define MAX_DPNI 8
+#define DPAA2_RX_DEFAULT_NBDESC 512
+
/*default tc to be used for ,congestion, distribution etc configuration. */
#define DPAA2_DEF_TC 0