[v1,4/4] net/hinic: optimize RSS RETA table updates

Message ID bc14ac569b4d5191ca2cf9db3d3424481447b557.1589442278.git.cloud.wangxiaoyun@huawei.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series fixes for queue resource free and code style |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/travis-robot warning Travis build: failed
ci/Intel-compilation success Compilation OK

Commit Message

Wangxiaoyun (Cloud) May 14, 2020, 9:29 a.m. UTC
  Before updating RSS indirection table, firstly determine whether
rq num in RETA table is legal, if it is invalid(such as exceeding
the maximum rxq num), driver will not update hw indirection
table and return fail.

Signed-off-by: Xiaoyun wang <cloud.wangxiaoyun@huawei.com>
---
 drivers/net/hinic/hinic_pmd_ethdev.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)
  

Patch

diff --git a/drivers/net/hinic/hinic_pmd_ethdev.c b/drivers/net/hinic/hinic_pmd_ethdev.c
index 8634fe8..2f0f33a 100644
--- a/drivers/net/hinic/hinic_pmd_ethdev.c
+++ b/drivers/net/hinic/hinic_pmd_ethdev.c
@@ -2075,16 +2075,16 @@  static int hinic_rss_indirtbl_update(struct rte_eth_dev *dev,
 	for (i = 0; i < reta_size; i++) {
 		idx = i / RTE_RETA_GROUP_SIZE;
 		shift = i % RTE_RETA_GROUP_SIZE;
-		if (reta_conf[idx].mask & (1ULL << shift))
-			indirtbl[i] = reta_conf[idx].reta[shift];
-	}
 
-	for (i = 0 ; i < reta_size; i++) {
-		if (indirtbl[i] >= nic_dev->num_rq) {
-			PMD_DRV_LOG(ERR, "Invalid reta entry, index: %d, num_rq: %d",
-				    i, nic_dev->num_rq);
-			goto disable_rss;
+		if (reta_conf[idx].reta[shift] >= nic_dev->num_rq) {
+			PMD_DRV_LOG(ERR, "Invalid reta entry, indirtbl[%d]: %d "
+				"exceeds the maximum rxq num: %d", i,
+				reta_conf[idx].reta[shift], nic_dev->num_rq);
+			return -EINVAL;
 		}
+
+		if (reta_conf[idx].mask & (1ULL << shift))
+			indirtbl[i] = reta_conf[idx].reta[shift];
 	}
 
 	err = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);