[v4,1/2] eal/arm64: update CPU flags
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Commit Message
From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com>
ARM64 Linux kernel updated the CPU flags using the HWCAP scheme.
The related marco definition can be found in linux kernel:
arch/arm64/include/uapi/asm/hwcap.h
This patch incorporates those changes to the eal library.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
---
v3 -> v4:
Update commit log.
v2 -> v3:
1. Change commit log.
2. Add HWCAP2_FLAGM2 and HWCAP2_FRINT to rte_cpu_feature_table[].
3. Add the flags for newly added items into enum rte_cpu_flag_t.
v1 -> v2:
Adds more sve-related definition to rte_cpu_feature_table,
sunch as SVE2, etc.
---
lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++++++++
lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++++++++
2 files changed, 26 insertions(+)
Comments
> -----Original Message-----
> From: Wei Hu (Xavier) <huwei013@chinasoftinc.com>
> Sent: Tuesday, August 18, 2020 4:09 PM
> To: dev@dpdk.org
> Cc: nd <nd@arm.com>; Honnappa Nagarahalli
> <Honnappa.Nagarahalli@arm.com>; Ruifeng Wang
> <Ruifeng.Wang@arm.com>; jerinjacobk@gmail.com;
> xavier.huwei@huawei.com
> Subject: [PATCH v4 1/2] eal/arm64: update CPU flags
>
> From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com>
>
> ARM64 Linux kernel updated the CPU flags using the HWCAP scheme.
> The related marco definition can be found in linux kernel:
> arch/arm64/include/uapi/asm/hwcap.h
>
> This patch incorporates those changes to the eal library.
>
> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
> ---
> v3 -> v4:
> Update commit log.
> v2 -> v3:
> 1. Change commit log.
> 2. Add HWCAP2_FLAGM2 and HWCAP2_FRINT to
> rte_cpu_feature_table[].
> 3. Add the flags for newly added items into enum rte_cpu_flag_t.
> v1 -> v2:
> Adds more sve-related definition to rte_cpu_feature_table,
> sunch as SVE2, etc.
> ---
> lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++++++++
> lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++++++++
> 2 files changed, 26 insertions(+)
>
> diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h
> b/lib/librte_eal/arm/include/rte_cpuflags_64.h
> index 95cc01474..aa7a56d49 100644
> --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h
> +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h
> @@ -22,6 +22,19 @@ enum rte_cpu_flag_t {
> RTE_CPUFLAG_SHA2,
> RTE_CPUFLAG_CRC32,
> RTE_CPUFLAG_ATOMICS,
> + RTE_CPUFLAG_SVE,
> + RTE_CPUFLAG_SVE2,
> + RTE_CPUFLAG_SVEAES,
> + RTE_CPUFLAG_SVEPMULL,
> + RTE_CPUFLAG_SVEBITPERM,
> + RTE_CPUFLAG_SVESHA3,
> + RTE_CPUFLAG_SVESM4,
> + RTE_CPUFLAG_FLAGM2,
> + RTE_CPUFLAG_FRINT,
> + RTE_CPUFLAG_SVEI8MM,
> + RTE_CPUFLAG_SVEF32MM,
> + RTE_CPUFLAG_SVEF64MM,
> + RTE_CPUFLAG_SVEBF16,
> RTE_CPUFLAG_AARCH64,
> /* The last item */
> RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
> diff --git a/lib/librte_eal/arm/rte_cpuflags.c
> b/lib/librte_eal/arm/rte_cpuflags.c
> index caf3dc83a..7b257b787 100644
> --- a/lib/librte_eal/arm/rte_cpuflags.c
> +++ b/lib/librte_eal/arm/rte_cpuflags.c
> @@ -95,6 +95,19 @@ const struct feature_entry rte_cpu_feature_table[] = {
> FEAT_DEF(SHA2, REG_HWCAP, 6)
> FEAT_DEF(CRC32, REG_HWCAP, 7)
> FEAT_DEF(ATOMICS, REG_HWCAP, 8)
> + FEAT_DEF(SVE, REG_HWCAP, 22)
> + FEAT_DEF(SVE2, REG_HWCAP2, 1)
> + FEAT_DEF(SVEAES, REG_HWCAP2, 2)
> + FEAT_DEF(SVEPMULL, REG_HWCAP2, 3)
> + FEAT_DEF(SVEBITPERM, REG_HWCAP2, 4)
> + FEAT_DEF(SVESHA3, REG_HWCAP2, 5)
> + FEAT_DEF(SVESM4, REG_HWCAP2, 6)
> + FEAT_DEF(FLAGM2, REG_HWCAP2, 7)
> + FEAT_DEF(FRINT, REG_HWCAP2, 8)
> + FEAT_DEF(SVEI8MM, REG_HWCAP2, 9)
> + FEAT_DEF(SVEF32MM, REG_HWCAP2, 10)
> + FEAT_DEF(SVEF64MM, REG_HWCAP2, 11)
> + FEAT_DEF(SVEBF16, REG_HWCAP2, 12)
> FEAT_DEF(AARCH64, REG_PLATFORM, 1)
> };
> #endif /* RTE_ARCH */
> --
> 2.27.0
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
@@ -22,6 +22,19 @@ enum rte_cpu_flag_t {
RTE_CPUFLAG_SHA2,
RTE_CPUFLAG_CRC32,
RTE_CPUFLAG_ATOMICS,
+ RTE_CPUFLAG_SVE,
+ RTE_CPUFLAG_SVE2,
+ RTE_CPUFLAG_SVEAES,
+ RTE_CPUFLAG_SVEPMULL,
+ RTE_CPUFLAG_SVEBITPERM,
+ RTE_CPUFLAG_SVESHA3,
+ RTE_CPUFLAG_SVESM4,
+ RTE_CPUFLAG_FLAGM2,
+ RTE_CPUFLAG_FRINT,
+ RTE_CPUFLAG_SVEI8MM,
+ RTE_CPUFLAG_SVEF32MM,
+ RTE_CPUFLAG_SVEF64MM,
+ RTE_CPUFLAG_SVEBF16,
RTE_CPUFLAG_AARCH64,
/* The last item */
RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
@@ -95,6 +95,19 @@ const struct feature_entry rte_cpu_feature_table[] = {
FEAT_DEF(SHA2, REG_HWCAP, 6)
FEAT_DEF(CRC32, REG_HWCAP, 7)
FEAT_DEF(ATOMICS, REG_HWCAP, 8)
+ FEAT_DEF(SVE, REG_HWCAP, 22)
+ FEAT_DEF(SVE2, REG_HWCAP2, 1)
+ FEAT_DEF(SVEAES, REG_HWCAP2, 2)
+ FEAT_DEF(SVEPMULL, REG_HWCAP2, 3)
+ FEAT_DEF(SVEBITPERM, REG_HWCAP2, 4)
+ FEAT_DEF(SVESHA3, REG_HWCAP2, 5)
+ FEAT_DEF(SVESM4, REG_HWCAP2, 6)
+ FEAT_DEF(FLAGM2, REG_HWCAP2, 7)
+ FEAT_DEF(FRINT, REG_HWCAP2, 8)
+ FEAT_DEF(SVEI8MM, REG_HWCAP2, 9)
+ FEAT_DEF(SVEF32MM, REG_HWCAP2, 10)
+ FEAT_DEF(SVEF64MM, REG_HWCAP2, 11)
+ FEAT_DEF(SVEBF16, REG_HWCAP2, 12)
FEAT_DEF(AARCH64, REG_PLATFORM, 1)
};
#endif /* RTE_ARCH */