diff mbox series

[v2,27/41] pipeline: add SWX instruction verifier

Message ID	20200907214032.95052-28-cristian.dumitrescu@intel.com (mailing list archive)
State	Superseded, archived
Delegated to:	Thomas Monjalon
Headers	IronPort-SDR: BFBLejXJdA20ObpzA2uS2epR86pS9EqOKEkqptQsg6hlHf8rsOhp4Sw7KbZwKhkV65YI6sGByq DYeuA8kS+xSQ== IronPort-SDR: 60d0pnjCUqhzBaPydJCkbt1ttCtIV2g160k/2rZfkwypIWBwW+w4YOoezYXP441pFqL5Yryzox endkgANjjCnA== From: Cristian Dumitrescu <cristian.dumitrescu@intel.com> To: dev@dpdk.org Date: Mon, 7 Sep 2020 22:40:18 +0100 Message-Id: <20200907214032.95052-28-cristian.dumitrescu@intel.com> In-Reply-To: <20200907214032.95052-1-cristian.dumitrescu@intel.com> References: <20200826151445.51500-2-cristian.dumitrescu@intel.com> <20200907214032.95052-1-cristian.dumitrescu@intel.com> Subject: [dpdk-dev] [PATCH v2 27/41] pipeline: add SWX instruction verifier Precedence: list Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org>
Series	Pipeline alignment with the P4 language \| [v2,00/41] Pipeline alignment with the P4 language [v2,01/41] pipeline: add new SWX pipeline type [v2,02/41] pipeline: add SWX pipeline input port [v2,03/41] pipeline: add SWX pipeline output port [v2,04/41] pipeline: add SWX headers and meta-data [v2,05/41] pipeline: add SWX extern objects and funcs [v2,06/41] pipeline: add SWX pipeline action [v2,07/41] pipeline: add SWX pipeline tables [v2,08/41] pipeline: add SWX pipeline instructions [v2,09/41] pipeline: add SWX rx and extract instructions [v2,10/41] pipeline: add SWX tx and emit instructions [v2,11/41] pipeline: add header validate and invalidate SWX instructions [v2,12/41] pipeline: add SWX mov instruction [v2,13/41] pipeline: add SWX dma instruction [v2,14/41] pipeline: introduce SWX add instruction [v2,15/41] pipeline: introduce SWX sub instruction [v2,16/41] pipeline: introduce SWX ckadd instruction [v2,17/41] pipeline: introduce SWX cksub instruction [v2,18/41] pipeline: introduce SWX and instruction [v2,19/41] pipeline: introduce SWX or instruction [v2,20/41] pipeline: introduce SWX xor instruction [v2,21/41] pipeline: introduce SWX shl instruction [v2,22/41] pipeline: introduce SWX shr instruction [v2,23/41] pipeline: introduce SWX table instruction [v2,24/41] pipeline: introduce SWX extern instruction [v2,25/41] pipeline: introduce SWX jmp and return instructions [v2,26/41] pipeline: add SWX instruction description [v2,27/41] pipeline: add SWX instruction verifier [v2,28/41] pipeline: add SWX instruction optimizer [v2,29/41] pipeline: add SWX pipeline query API [v2,30/41] pipeline: add SWX pipeline flush [v2,31/41] pipeline: add SWX table update high level API [v2,32/41] pipeline: add SWX pipeline specification file [v2,33/41] port: add ethernet device SWX port [v2,34/41] port: add source and sink SWX ports [v2,35/41] table: add exact match SWX table [v2,36/41] examples/pipeline: add new example application [v2,37/41] examples/pipeline: add message passing mechanism [v2,38/41] examples/pipeline: add configuration commands [v2,39/41] examples/pipeline: add l2fwd example [v2,40/41] examples/pipeline: add l2fwd with MAC swap example [v2,41/41] examples/pipeline: add VXLAN encapsulation example

Checks

Context	Check	Description
ci/checkpatch	success	coding style OK

Commit Message

Cristian Dumitrescu Sept. 7, 2020, 9:40 p.m. UTC

  Instruction verifier. Executes at instruction translation time during
SWX pipeline build, i.e. at initialization instead of run-time.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
---
 lib/librte_pipeline/rte_swx_pipeline.c | 51 ++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff mbox series

Patch

diff --git a/lib/librte_pipeline/rte_swx_pipeline.c b/lib/librte_pipeline/rte_swx_pipeline.c
index ef388fec1..d51fec821 100644
--- a/lib/librte_pipeline/rte_swx_pipeline.c
+++ b/lib/librte_pipeline/rte_swx_pipeline.c
@@ -5653,6 +5653,53 @@  instr_jmp_resolve(struct instruction *instructions,
 	return 0;
 }
 
+static int
+instr_verify(struct rte_swx_pipeline *p __rte_unused,
+	     struct action *a,
+	     struct instruction *instr,
+	     struct instruction_data *data __rte_unused,
+	     uint32_t n_instructions)
+{
+	if (!a) {
+		enum instruction_type type;
+		uint32_t i;
+
+		/* Check that the first instruction is rx. */
+		CHECK(instr[0].type == INSTR_RX, EINVAL);
+
+		/* Check that there is at least one tx instruction. */
+		for (i = 0; i < n_instructions; i++) {
+			type = instr[i].type;
+
+			if (instr[i].type == INSTR_TX)
+				break;
+		}
+		CHECK(i < n_instructions, EINVAL);
+
+		/* Check that the last instruction is either tx or unconditional
+		 * jump.
+		 */
+		type = instr[n_instructions - 1].type;
+		CHECK((type == INSTR_TX) || (type == INSTR_JMP), EINVAL);
+	}
+
+	if (a) {
+		enum instruction_type type;
+		uint32_t i;
+
+		/* Check that there is at least one return or tx instruction. */
+		for (i = 0; i < n_instructions; i++) {
+			type = instr[i].type;
+
+			if ((type == INSTR_RETURN) || (type == INSTR_TX))
+				break;
+		}
+		CHECK(i < n_instructions, EINVAL);
+	}
+
+	return 0;
+}
+
 static int
 instruction_config(struct rte_swx_pipeline *p,
 		   struct action *a,
@@ -5701,6 +5748,10 @@  instruction_config(struct rte_swx_pipeline *p,
 	if (err)
 		goto error;
 
+	err = instr_verify(p, a, instr, data, n_instructions);
+	if (err)
+		goto error;
+
 	err = instr_jmp_resolve(instr, data, n_instructions);
 	if (err)
 		goto error;