diff mbox series

[v1,2/2] net/mlx5: fix using hairpin without dest DevX TIR support

Message ID 1600023922-14738-2-git-send-email-michaelba@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series [v1,1/2] net/mlx5: fix Rx objects creator selection |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/iol-testing warning Testing issues
ci/Intel-compilation success Compilation OK

Commit Message

Michael Baum Sept. 13, 2020, 7:05 p.m. UTC 
  The PMD supports hairpin only if DevX is supported and DV flow is enable.

When destination DevX TIR is not supported, the PMD tries to create TIR
action, and fails.

Avoid supporting hairpin when destination DevX TIR is not supported.

Fixes: b6b3bf86bd1a ("net/mlx5: get hairpin capabilities")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/net/mlx5/mlx5_ethdev.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index cefb450..a7924b1 100644
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -569,12 +569,12 @@  struct mlx5_priv *
  *   0 on success, a negative errno value otherwise and rte_errno is set.
  */
 int
-mlx5_hairpin_cap_get(struct rte_eth_dev *dev,
-			 struct rte_eth_hairpin_cap *cap)
+mlx5_hairpin_cap_get(struct rte_eth_dev *dev, struct rte_eth_hairpin_cap *cap)
 {
 	struct mlx5_priv *priv = dev->data->dev_private;
+	struct mlx5_dev_config *config = &priv->config;
 
-	if (priv->sh->devx == 0) {
+	if (!priv->sh->devx || !config->dest_tir || !config->dv_flow_en) {
 		rte_errno = ENOTSUP;
 		return -rte_errno;
 	}